Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices
Reexamination Certificate
2001-03-02
2002-10-29
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
With particular solid state devices
C341S120000
Reexamination Certificate
active
06473015
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention generally relates to improved current-steering D/A conversion, and particularly to an improved method for using a current-steering D/A converter, and to the D/A converter. The method and the converter specifically comprise compensation for deterministic errors due to linearly graded current source mismatch in the D/A converter.
DESCRIPTION OF RELATED ART AND BACKGROUND OF THE INVENTION
D/A converters are commonly used in integrated circuits made by CMOS technology, but may also be used in other types of technologies.
D/A converters can be implemented in a variety of ways. For reasons of technology and precision many converters use parallel-connected current sources whose output is directed either towards an output of the converter or towards a reference terminal. The current sources are typically formed by multiple current mirror whose output transistors are all preferably identical.
Such D/A converters are depicted in for example U.S. Pat. Nos. 5,870,044, 5,162,800, 5,870,044 and 5,105,193.
Mismatch between current sources is a crucial problem in current-steering D/A converters for high-speed and high-resolution applications. Today, complicated layout styles or randomization or dynamic element matching (DEM) techniques are used to solve the problem.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a method for using a current-steering N-bit D/A converter comprising N binary weighted current sources SI
k
, k=0, 1, . . . , N−1, connectable to a common output, each current source SI
k
comprising 2
k
unit current sources, SI
unit
, of equal strength connected in parallel, wherein digital input bits b
i
, i=0, 1, . . . , N−1, b
N−1
being the most significant bit (MSB), determine which respective current source, SI
k
, k=0, 1, . . . , N−1, to be connected to the output, which solves, or at least reduces, the problem of mismatch between current sources as depicted above.
It is in this respect a particular object of the invention to provide such a method that is simple, fast, accurate, precise, effective, reliable, and easy to install, and particularly of low cost.
It is yet a further object of the invention to provide such method, which may be implemented by using a minimum of components.
These objects among others are, according to first aspect of the invention, attained by a method, in which, during D/A conversion, the current I
N−1
from the largest current source SI
N−1
is substituted for a current Ĩ
N−1
, where
I
~
N
-
1
=
(
∑
k
=
0
N
-
2
I
k
)
+
I
unit
I
k
being the current from the current source SI
k
, and I
unit
being the current from an additional unit current source.
The method is denoted simple MSB (Most Significant Bit) calibration, as it only compensates for the current I
N−1
from the largest current source SI
N−1
. The method is preferably implememted such that the D/A converter is calibrated prior to D/A conversion. The calibration comprises that the currents I
N−1
and Ĩ
N−1
are measured and that the current difference &Dgr;I between the measured currents is formed and stored. The substitution performed during conversion comprises then that the current Ĩ
N−1
is formed by subtracting the current difference &Dgr;I from the current I
N−1
of the largest current source.
The above-mentioned objects among others are, according to a second aspect of the invention, attained by a method, in which, during D/A conversion, the currents I
N−1
, I
N−2
, . . . , I
N−c
, from the c largest current sources SI
N−1
, SI
N−2
, SI
N−c
, c being a positive integer larger than 1, are substituted for currents Ĩ
N−1
,Ĩ
N−2
, . . . , Ĩ
N−c
, where
I
~
N
-
1
=
(
∑
k
=
0
N
-
c
-
1
I
k
)
+
(
∑
j
=
N
-
c
N
-
2
I
~
j
)
+
I
unit
I
~
N
-
2
=
(
∑
k
=
0
N
-
c
-
1
I
k
)
+
(
∑
j
=
N
-
c
N
-
3
I
~
j
)
+
I
unit
…
I
~
N
-
c
=
(
∑
k
=
0
N
-
c
-
1
I
k
)
+
I
unit
in which expressions I
k
being the current from the current source SI
k
, and I
unit
being the current from an additional unit current source. This method is denoted generalized MSB calibration, as it compensates for the currents I
N−1
, I
N−2
, . . . , I
N−c
from the c largest current source SI
N−1
, SI
N−2
, . . . , SI
N−c
.
The present method may be implemented in the same manner as the method of the first aspect of the invention, but preferably the method is implemented through the following calibration procedure prior to D/A conversion:
The currents I
N−1
, I
N−2
, . . . , I
N−c
, and Ĩ
N−1
are measured;
current difference &Dgr;I
N−1
=I
N−1
−Ĩ
N−1
is formed; and
current differences &Dgr;I
N−2
=I
N−2
−Ĩ
N−2
, . . . , &Dgr;I
N−c
=I
N−c
−Ĩ
N−c
are provided as fractions of &Dgr;I
N−1
. The substitution, during conversion, comprises that the respective current Ĩ
N−1
,Ĩ
N−2
, . . . , Ĩ
N−c
, is formed by subtracting the respective current difference &Dgr;I
N−1
, &Dgr;I
N−2
, . . . , &Dgr;I
N−c
, from the respective current I
N−1
, I
N−2
, . . . , I
N−c
.
Preferably, the fractions are provided from prior knowledge of the relative mismatch between the N binary weighted current sources.
A further object of the present invention is to provide current-steering N-bit D/A converters, comprising N digital inputs, each receiving a digital input bit b
i
, i=0, 1, . . . , N−1, b
N−1
being the most significant bit (MSB); an analog output; and N binary weighted current sources SI
k
, k=0, 1, . . . , N−1, connectable to said analog output, each current source SI
k
comprising 2
k
unit current sources, SI
unit
, of equal strength connected in parallel, wherein the digital input bits are indicative of which respective current source, SI
k
, k=0, 1, . . . , N−1, to be connected to the analog output, in which the method according to the first and second aspects of the invention, may be implemented.
Consequently, there is according to a third aspect of the present invention provided such a D/A converter further comprising an additional unit current source and means for substituting the current I
N−1
from the largest current source SI
N−1
for a current Ĩ
N−1
where
I
~
N
-
1
=
(
∑
k
=
0
N
-
2
I
k
)
+
I
unit
I
k
being the current from the current source SI
k
, and I
unit
being the current from said additional unit current source.
According to a fourth aspect of the present invention there is provided such a D/A converter further comprising an additional unit current source and means for substituting the currents I
N−1
, I
N−2
, . . . , I
N−c
, from the c largest current sources SI
N−1
, SI
N−2
, . . . , SI
N−c
, c being a positive integer larger than 1, for currents Ĩ
N−1
,Ĩ
N−2
, . . . , Ĩ
N−c
, where
I
~
N
-
1
=
(
∑
k
=
0
N
-
c
-
1
I
k
)
+
(
∑
j
=
N
-
c
N
-
2
I
~
j
)
+
I
unit
I
~
N
-
2
=
(
∑
k
=
0
N
-
c
-
1
I
k
)
+
(
∑
j
=
N
-
c
N
-
3
I
~
j
)
+
I
unit
…
I
~
N
-
c
=
(
∑
k
=
0
N
-
c
-
1
I
k
)
+
I
unit
in which expressions I
k
being the current from the current source SI
k
, and I
unit
being the current from said additional unit current source.
The inventive D/A converters may comprise a current mirror for the forming of above said current differences, which differences may be stored and restored in a net
Burns Doane , Swecker, Mathis LLP
Telefonaktiebolaget LM Ericsson
Wamsley Patrick
LandOfFree
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