Current source bias circuit with hot carrier injection tracking

Details Current source bias circuit with hot carrier injection tracking Current source bias circuit with hot carrier injection tracking

1999-09-01

2001-03-13

Lee, Benny (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including current mirror amplifier

C330S307000

Reexamination Certificate

active

06201444

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates generally to insulated gate field effect transistors (IGFETs) and particularly MOSFET transistor circuits in which hot carrier injection is experienced, and more particularly the invention relates to a current source or current mirror bias circuit in which a reference device has characteristics which track degradation in a main device due to hot carrier injection in the main device.
A conventional current source or current mirror circuit comprises a transistor having base-collector (bipolar) or gate-drain (FET) connected whereby the transistor functions as a diode. The circuit is typically used as a biasing element for other transistors so that common operating characteristics are shared by many transistor devices biased by a common current source. Current through the reference transistor is mirrored (exactly or fractionally) in the main transistor.
However, a main transistor with hot carrier injection in the channel/drain regions experiences a degradation of operating characteristics which is not experienced in the reference transistor due to the fact that the drain-gate electric field is zero. The present invention is directed to providing a modified current source bias circuit in which the reference transistor operating characteristics degrade in accordance with hot carrier injection degradation in the main transistor.
SUMMARY OF THE INVENTION
In accordance with the invention, the drain-gate bias on the reference transistor in a current mirror is not held to 0 Volt but is allowed to be positive. This allows the drain-gate electric field to be non-zero. A voltage divider circuit connects the reference voltage at the drain of the reference transistor to the gate of the main transistor.
In a preferred embodiment in which the reference transistor comprises a lateral field effect transistor including a lightly doped drain region, the physical structure of the reference transistor is altered by shortening the gate length, shortening the n-lightly doped drain or high voltage extension region (NHV) of the drain, or by increasing the doping of the NHV region. Any of these changes can increase the electric field in the reference transistor to thereby track hot carrier injection degradation in the main transistor, which is necessary since the drain-gate potential of the reference device is not equal to the drain-gate potential of the main device. Advantageously, each change in the physical structure of the reference transistor is readily accomplished on the same die as the main transistor by using a different photomask dimension for the reference transistor gate, using a different photomask image for the NHV region of the reference device, and by using a different local implant in the NHV region of reference device.
The invention and objects and features thereof will be more readily apparent from the following detailed description and appended claims when taken with the drawing.


REFERENCES:
patent: 3221182 (1965-11-01), Anderson et al.
patent: 5392004 (1995-02-01), Masliah
patent: 5493255 (1996-02-01), Murtojarvi
patent: 6046642 (2000-04-01), Brayton et al.
Sze, S.M. ,Physics of Semiconductor Devices, Second Edition, John Wiley & Sons, p. 77 (1981).
Gray, Paul R. and Meyer, Robert G.,Analysis and Design of Analog Integrated Circuits, Second Edition, John Wiley & Sons, pp. 233-239 and pp. 705-710 (1977, 1984).

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