Static information storage and retrieval – Read only systems – Semiconductive
Reexamination Certificate
2005-08-30
2005-08-30
Nguyen, VanThu (Department: 2824)
Static information storage and retrieval
Read only systems
Semiconductive
C365S175000, C365S189060, C365S189070, C365S206000, C365S207000, C365S214000
Reexamination Certificate
active
06937495
ABSTRACT:
A memory array includes a sensing circuit for sensing bit line current while keeping the voltage of the selected bit line substantially unchanged. The word lines and bit lines are biased so that essentially no bias voltage is impressed across half-selected memory cells, which substantially eliminates leakage current through half-selected memory cells. The bit line current which is sensed arises largely from only the current through the selected memory cell. A noise detection line in the memory array reduces the effect of coupling from unselected word lines to the selected bit line. In a preferred embodiment, a three-dimensional memory array having a plurality of rail-stacks forming bit lines on more than one layer, includes at least one noise detection line associated with each layer of bit lines. A sensing circuit is connected to a selected bit line and to its associated noise detection line.
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Matrix Semiconductor Inc.
Nguyen Van-Thu
Zagorin O'Brien Graham LLP
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