Current saving mode for input buffers

Details Current saving mode for input buffers Current saving mode for input buffers

2001-08-10

2003-04-22

Zweizig, Jeffrey (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

C327S534000

Reexamination Certificate

active

06552596

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates to integrated circuits and in particular to an input buffer for digital logic circuits.
BACKGROUND OF THE INVENTION
Most digital integrated circuits have input buffers to receive external input signals. Some input buffers are used to receive input signals that indicate operating modes of the integrated circuits. For example, some memory devices such as dynamic random access memory (DRAM) devices have input buffers to receive an external clock enable signal that indicates the operating modes of the DRAM device such as an active mode and a low-power mode. The low-power mode of a DRAM device is sometime referred to as the standby mode or precharge power-down mode. For example, in a conventional DRAM device, a read or a write operation is normally performed in the active mode and a self-refresh operation is normally be performed in the low-power mode.
Typically, a differential input buffer of an integrated circuit or a DRAM device consumes the same amount of current in both active and low-power modes. As the current consumption requirement is reduced for new generation of integrated circuits and DRAM devices, reducing current consumption of conventional differential input buffers may be necessary.
For these and other reasons stated below, and which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need for an improved input buffer.
SUMMARY OF THE INVENTION
The present invention includes an input buffer which consumes less current during a low-power mode than during an active mode.
In one aspect, the input buffer includes an input stage to receive an input signal and a reference signal to produce an output signal. An output stage connects to the input stage to receive and drive the output signal. The input buffer further includes a switching system to connect the input stage to a supply voltage and ground via a first conductive path during an active mode. During a low-power or standby mode, the switching system connects the input stage to the supply voltage and ground via a second conductive path, in which an active resistance of the second conductive path is substantially greater than an active resistance of the first conductive path.
In another aspect, a method of reducing current in a buffer in a low-power mode is described. The method includes receiving a reference signal and an input signal at inputs of a differential amplifier. The method further includes varying a resistance of a conductive path that connects the amplifier to a supply voltage and ground between an active mode and a low-power mode.


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