Current monitoring and/or regulation for sense FET's

Details Current monitoring and/or regulation for sense FET's Current monitoring and/or regulation for sense FET's

1990-11-05

1992-01-07

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072968, 307304, 307491, 307494, 307568, H03K 1718, H03K 17687

Patent

active

050794566

ABSTRACT:
A method and apparatus is disclosed for measuring and/or controlling the level of current in a Sense FET which includes a power transistor (M1) and a sense transistor (M2). The transistors (M1) and (M2) are both biased to operate in a linear mode, and the Vds of the sense transistor (M2) is compared to a predetermined fraction of the Vds of the power transistor (M1). A control signal is generated that is representative of the results of the comparison, and, in one embodiment, that control signal is used in a feedback arrangement to drive the Vds of the sense transistor (M2) to the predetermined fraction of the Vds of the power transistor (M1). Consequently, the level of current carried by the sense transistor (M2) is caused to be equal to the same predetermined fraction of the current carried by the power transistor (M1).

REFERENCES:
patent: 4667121 (1987-05-01), Fay et al.
patent: 4675561 (1987-06-01), Bowers
patent: 4952827 (1990-08-01), Leipold et al.
patent: 5032745 (1991-07-01), Izadinia et al.

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