Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
1999-09-29
2001-07-17
Tokar, Michael (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S155000, C341S161000, C341S156000, C341S162000, C341S110000, C341S170000, C341S126000, C341S139000
Reexamination Certificate
active
06262678
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to the field of electronic computers and computation. More particularly, the present invention relates, in one aspect, to hybrid analog and digital computation. Still more particularly, the present invention relates to spike-based analog-to-digital conversion using hybrid analog-digital techniques and organizations.
BACKGROUND OF THE INVENTION
Analog-to-digital conversion is used in a wide variety of electronics applications—from testing and measurement to entertainment electronics and beyond. In modern practice virtually any electronics application that involves real-word (analog) signals such as sounds, light and temperature employs treatment of corresponding signals in digital form for some part of its operation. Thus, for example, music compact discs store and make available for retrieval digital versions of what normally originate as analog voice or instrument signals. Upon retrieval, such stored signals typically return to their original analog form for playback.
Conversion of signals between the analog and digital domains is therefore a well-developed art. In a larger sense, analog-to-digital (A/D) conversion relates to the conversion of a continuous variable to a nearest discrete approximation, which approximation is generally represented as a multi-bit binary number. See, for example, P. Horowitz and W. Hill,
The Art of Electronics
, Cambridge Univ. Press, Cambridge, 1989, pp. 612-641.
Many prior analog-to-digital (A/D) converters employ voltage sample-and-hold techniques. These prior techniques thus employ a voltage signal sampled at an instant within a longer period, rather than using a signal averaged over the period. In such sampled operation, noise present at the time of sampling can significantly affect the value used in conversion.
Other structures characteristic of prior A/D architectures include subtractors or other comparator circuitry, or they include explicit D/A converters and other interstage circuitry, all of which tend to increase complexity, required device area and, consequently, cost. Moreover, when traditional architectures perform subranging without subtraction and inter-stage DACs they typically suffer from a requirement that the common-mode voltage range of fine conversion(s) must extend over the entire common-mode range of the coarse conversion(s), thereby degrading speed of operation.
Another phenomenon suffered by traditional architectures arises when comparator s, which are ubiquitous in A/D converters, hover indefinitely between their stable ‘0’ or ‘1’ states. Such metastability arises when input and reference voltages of the comparator are very near to each other, thus causing internal positive and negative currents in the comparator to be almost balanced; such near-perfect balance results in very slow operation of the comparator and causes digital decisions to be made on premature analog values.
In my incorporated patent application entitled Spike-Based Hybrid Computation I describe, inter alia, a comprehensive structure, organization and methodology for a novel hybrid state machine that includes both analog and digital structures. Such computational structures convieniently employ spiking neuron circuits modeled generally on neuron functioning in animals. Illustrative circuits described in this incorporated patent application include so-called neuron circuits for accumulating analog current signals over a period of time and the generation of fast-rising spiking signals as output. Moreover, many traditional analog and digital circuits are advantageously avoided in my new computation architecture by using flip-flops, counters and other circuit elements adapted to receive spiking inputs of the type generated by the above-noted neuron circuits. Important advantages arise from the use the spike-based computing architecture, and circuit elements, as described in the incorporated patent applications.
A further aspect of the incorporated patent application entitled Spike-Based Hybrid Computation is the use in some cases of analog-to-digital conversion techniques, e.g., in restoring analog signals to avoid significant degradation during transmission and processing over time. This restoration is convieniently performed as an analog-to-digital conversion followed by a digital-to-analog conversion. Thus, in the context of hybrid computation of the type described in this incorporated patent application, a simple digital-to-analog (D/A) converter is used to convert the A/D-converted value (from binary form) back to a continuous value—thus implementing an analog-to-digital-to-analog (A/D/A) conversion. It will be appreciated that such use of an A/D/A process effectively performs a rounding operation.
Because my spike-based hybrid computing architectures and circuitry achieve important performance and flexibility advantages, and because prior A/D converters are not well adapted for use with spiking neuron circuits and other spike-based circuitry, a need exists for Current-Mode Spike-Based Analog-to-Digital Conversion circuits and methods.
SUMMARY OF THE INVENTION
The limitations of the prior art are overcome and a technical advance is made and described herein in illustrative embodiments. In particular, A/D converter circuits and techniques are described that are useful when the input is a current and also prove useful in the context of spike-based computing of the type described above. Use of combined analog and digital circuitry employing spiking neuron signals contributes to high power and device implementation efficiencies. Present inventive circuits and techniques differ from prior AID designs in several respects.
A basic mathematical relationship that is exploited in the design of my converters is that between charge, Q, current, I, and time, t, i.e., Q=I×t. The novel use of this relationship in A/D converters, rather than the more traditional ones of V=I×R (Ohm's law), or Q=C×V (charge relationship of a capacitor), affords many advantages as discussed below.
In a first aspect, present inventive contributions are charge-and-current based rather than voltage-based. In accordance with embodiments of the present invention, input current is not sampled at an instant, but rather is represented by its average effect in an integration period, i.e., by its charge-accumulation capabilities over time. Improved noise immunity is thereby realized. Further, no explicit sample-and-hold (S/H) circuit is necessary in application of the present inventive techniques, because integration of input current for a given time period on a capacitor is used instead. Advantageously, input signals are sensed only at one stage of the computation; all further information is coded in successive residues.
In accordance with another aspect of the present invention, no explicit subtractor is required in the present inventive architecture; subtraction is performed implicitly by resetting of a neuron. Further, there are no explicit digital-to-analog converters (DACs) between stages in embodiments of the present invention; a residue from the previous stage of conversion is automatically created in a form suited for the next stage of conversion. Subranging with implicit subtraction and interstage DAC conversion are thus embodied without introducing dynamic range problems in respect of the input charge; a lack of a large dynamic range of operation in any local neuron prevents speed degradation.
With the avoidance of such DACs, subtractors, inter-stage comparators, sample-and-hold circuits, and because comparison and amplification operations are combined in one 2-neuron circuit, present inventive architectures prove very area efficient for device implementation. Non-pipelined architectures are also used to advantage in embodiments of the present invention to further increase area efficiency, at least in part because coarse and fine conversions use the same 2-neuron circuit. The small number of circuit components that are required in illustrative embodiments increases the power ef
Lucent Technologies - Inc.
Mai Lam T.
Ryan William
Tokar Michael
LandOfFree
Current-mode spike-based analog-to-digital conversion does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Current-mode spike-based analog-to-digital conversion, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Current-mode spike-based analog-to-digital conversion will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2496207