Current mode simultaneous dual-read/single-write memory device

Details Current mode simultaneous dual-read/single-write memory device Current mode simultaneous dual-read/single-write memory device

1977-01-03

1978-01-24

Fears, Terrell W.

Static information storage and retrieval

Addressing

Sync/clocking

365 49, 365179, G11C 1140

Patent

active

040706575

ABSTRACT:
A current mode 20-bit memory is organized as four words each containing five bits. The memory comprises a clock circuit a data-in circuit, comprising a plurality of data selectors and master latch registers, a data-out circuit comprising two independent sets of output buffers, two independent read select circuits, a write select circuit, a 4x5 matrix of memory cells, and non-functional testing circuit. In one mode data may be independently read from any two words at the same time that data is written into any one word. In another mode, all bits in a selected word may be synchronously reset. In a third mode the storage elements associated with one selected word may be configured as an inverting shift register for testing and diagnostic purposes. The device is implemented in current mode logic, and a portion of the circuitry operates on differential level signals for increased operational speed and efficiency.

REFERENCES:
patent: 3895360 (1975-07-01), Cricchi

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