Current mode binary/BCD arithmetic array

Details Current mode binary/BCD arithmetic array Current mode binary/BCD arithmetic array

1975-05-09

1976-05-18

Malzahn, David H.

Registers

Transfer mechanism

Traveling pawl

235175, G06F 750

Patent

active

039581128

ABSTRACT:
An arithmetic logic array employing soft-saturating current mode logic gates operates on pure binary data or binary coded decimal data. Two 4-bit data inputs are received along with a 5-bit Op code, a carry input, and decimal arithmetic operation signals. In response to a decimal add (DA) one data input is increased by a count of six, and in response to either a BCD add or a BCD subtract (DA + DS) the output is decreased by a count of six if no carry output is generated.

REFERENCES:
patent: 3265876 (1966-09-01), Lethin
patent: 3596074 (1971-07-01), Mitrofanoff
patent: 3711693 (1973-01-01), Dahl
patent: 3752394 (1973-09-01), Igel
Bodner and Leininger "Eight-bit Arithmetic & Logic Unit" IBM Tech. Disclosure Bulletin, Vol. 13, No. 8 Jan. 1975, pp. 2402-2406.

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