Electricity: power supply or regulation systems – Self-regulating – Using a three or more terminal semiconductive device as the...
Patent
1994-01-21
1996-05-07
Wong, Peter S.
Electricity: power supply or regulation systems
Self-regulating
Using a three or more terminal semiconductive device as the...
257561, 327481, G05F 316
Patent
active
055149499
DESCRIPTION:
BRIEF SUMMARY
FIELD OF THE INVENTION
The present invention relates to a current mirror having at least one pnp transistor. More specifically, the present invention relates to a current mirror having overvoltage protection.
BACKGROUND OF THE INVENTION
German Patent Application DE 38 13 436 A1 describes a current source designed to prevent the saturation of a given lateral pnp-transistor structure of an integrated switching arrangement, independently of type and without restricting the operating range. For this purpose, a protective collector placed concentrically around the self-concentric collector is used. German Patent Application DE 38 13 436 A1 does not disclose any protection against overvoltages. Moreover, the concentric protective collector requires a large transistor surface, and such a large transistor surface should be avoided.
SUMMARY OF THE INVENTION
The current mirror according to the present invention has at least one pnp transistor having a base, an emitter, a first partial collector and a second partial collector, with the collectors essentially encircling the emitter. The first partial collector and the base are linked to a reference current source. The second partial collector is linked to a terminal connection. The first and second partial collectors are designed to protect against an overvoltage condition across the terminal connection. The advantage of the current mirror according to the present invention is that, for example, the input or output of the current mirror is automatically protected from overvoltage without necessitating additional circuit expenditure, i.e., neither comparators nor closed-loop control circuits, or the like, are needed. The configuration according to the present invention requires a very small surface area and, in the event of overvoltage, the received current is only able to rise to a limiting value. This limiting current is able to be reduced virtually as needed through the topology, i.e., the layout.
A further advantage of a current mirror design in accordance with the present invention is obtained through the application of two pnp-transistors in a current-mirror circuit. The two pnp-transistors are disposed side-by-side in a shared pan having a common base, thereby allowing the maximum overcurrent to be reduced still further in the event of an overvoltage condition. In this case, the first partial collector of the first transistor connected to the reference-current source is arranged directly next to the second partial collector linked to the terminal connection of the second transistor to be protected from overvoltage, so that the partial collector connected to the reference-current source is confronted with a large parasitic emitter surface.
A still further advantage in accordance with the present invention is achieved by having the two second partial collectors of the two transistors linked to the terminal connection face one another, and an additional (third) collector surface connected to the reference-current source arranged in-between the two second partial collectors. This additional collector surface can have a lamellar, T-or double-T-shaped design, and is able to receive as optimally as possible the emitter current from the two parasitic emitters formed in the event of overvoltage.
Another advantage in accordance with the present invention is achieved by having the two first partial collectors of the two transistors connected to the reference-current source face one another, and an additional collector surface joined to the terminal connection being disposed in-between the two first partial collectors. It proves to be especially beneficial here to design the additional collector surface as a one-piece collector surface of another transistor. When, in addition, still other collector surfaces connected to the reference-current source are arranged along the two outwardly pointing partial collectors of the two transistors linked to the terminal connection, then the ratio of the overvoltage current to the reference current can be reduced to the value of 0
REFERENCES:
patent: 3958267 (1976-05-01), Frederiksen et al.
patent: 3987477 (1976-10-01), Krolik
patent: 4730127 (1988-03-01), Susak
Bross Guenter
Byrne Gerard
Han Y. Jessica
Robert & Bosch GmbH
Wong Peter S.
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