Current mirror compensation system for power amplifiers

Amplifiers – With semiconductor amplifying device – Including current mirror amplifier

Reexamination Certificate

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Details

C330S289000, C330S296000

Reexamination Certificate

active

06437647

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention is generally related to control of transistor quiescent current. More particularly, it is related to a system for compensating for changes in a power amplifier's supply voltage such that the power amplifier's quiescent current is stabilized for changing operating conditions.
2. Related Art
The quiescent current drawn by a transistor is generally approximated by a constant when the base-emitter voltage and the collector voltage (Vcc) are constant. When such a transistor is employed in a circuit to perform a task, such as in a power amplifier for a radio frequency (RF) transmitter, maintaining a substantially constant quiescent current over a variety of operating conditions is important.
Prior art methods are available that can maintain substantially stable transmitter base-emitter voltages over a variety of operating conditions. One such example is a mirror bias circuit. A mirror bias circuit employs a reference voltage (Vref) or a reference current (Iref) to maintain a substantially constant base-emitter voltage. However, maintaining a constant collector voltage (Vcc) may be more difficult. When the collector voltage is provided by a battery source, such as in a mobile communication device or portable cell phone, collector voltage changes as the battery is discharged from the initial fully charged state by the use of the device. For example, in one type of mobile communication device, battery voltage may start at a fully charged voltage of 5 volts, and drop to 2.8 volts before the device shuts down because of low battery power conditions.
Prior art techniques have been developed to minimize variations in collector voltage. One technique is to conserve power consumption in the device when not in use. However, such techniques add additional costs, and battery discharge is inevitable. Other methods may employ circuitry that provides a constant collector voltage from the varying battery voltage. However, such circuitry adds cost to the device and may result in extra power consumption.
Thus, a need exists in the industry to address the problem of providing a substantially stable transistor quiescent current over a range of operating conditions (variations in collector voltage) without the use of expensive additional components or sacrifices in power efficiency caused by additional control circuitry.
SUMMARY
The invention provides a system for stabilizing quiescent current in a transistor. Briefly described, one embodiment can be implemented by employing two compensating resistors configured in a mirror bias circuit coupled to a radio frequency (RF) power amplifier circuit such that base-emitter voltages of the transistors are adjusted in a manner such that quiescent current through the RF transistor is stabilized for variations in collector voltage Vcc. In this embodiment, the collector voltage Vcc is associated with the battery power supply in a mobile communication device, such as but not limited to, a cell phone. A first compensating resistor is connected to the base of a mirror transistor, thereby creating a series circuit having the first compensating resistor, a mirror transistor and a reference transistor. A second compensating resistor is connected to the base of a buffer transistor, thereby creating a series circuit having a second compensating resistor, a buffer transistor and the RF transistor.
As collector voltage Vcc decreases, which may occur when the battery power is drained during use of the communication device, less current is drawn through the two above-described series circuits. As the voltage drop across the first compensating resistor decreases, base-emitter voltages of the mirror transistor and the reference transistor tend to increase. These increasing base-emitter voltages are reflected over to the RF power amplifier circuit resulting in an increase in the base-emitter voltages of the buffer transistor and the RF transistor. As the base-emitter voltage of the RF transistor increases, collector current drawn by the RF transistor tends to increase. Thus, the tendency of collector current in the RF transistor, also known as quiescent current, to decrease as the collector voltage Vcc decreases is off-set by a tendency to increase collector current due to the increased base-emitter voltage of the RF transistor.
Alternative embodiments include moving the first compensating resistor to be located between the emitter of the mirror transistor and the base of the reference transistor. Here, the size of the first compensating resistor would be reduced by a factor equal to the amplification of the mirror transistor (&bgr; mirror transistor). Another embodiment moves the second compensating resistor to be located between the emitter of the buffer transistor and the base of the RF transistor. Likewise, the size of the second compensating resistor is reduced by a factor equal to the amplification of the buffer transistor (&bgr; buffer transistor). Another embodiment relocates both the first compensating resistor and the second compensating resistor in a manner described above. Other embodiments employ electrical devices that have resistive-like characteristics that provide the required compensation to the transistor base-emitter voltages.
In one embodiment, the size of the first compensating resistor is equal to the size of the second compensating resistor multiplied by the ratio of the buffer transistor current rating to the mirror transistor current rating. In other embodiments, the relative sizing of the compensating resistors may be varied to decrease or increase the amount of compensation applied to the base-emitter voltage of the RF transistor.
Other systems, methods, features, and advantages of the invention will be or become apparent to one with skill in the art upon examination of the following drawings and detailed description. It is intended that all such additional systems, methods, features, and advantages be included within this description, be within the scope of the invention, and be protected by the accompanying claims.


REFERENCES:
patent: 4311967 (1982-01-01), Schade, Jr.
patent: 4409558 (1983-10-01), Knijnenburg et al.
patent: 5416365 (1995-05-01), Maida
patent: 6172549 (2001-01-01), Gilbert
patent: 6313705 (2001-11-01), Dening et al.

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