Current mirror circuit with interconnected control...

Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Electromagnetic or particle radiation

Reexamination Certificate

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Details

C327S538000

Reexamination Certificate

active

06747330

ABSTRACT:

The invention pertains to a current mirror circuit including a current input terminal, a current output terminal and a common terminal, a first controllable semiconductor element arranged between the current input terminal and the common terminal, a second controllable semiconductor element arranged between the current output terminal and the common terminal, the controllable semiconductor elements having interconnected control electrodes which are also coupled to a bias voltage source, for biasing said control electrodes at a reference voltage, the circuit further including a transconductance stage having an input coupled to the current input terminal and an output coupled to the common terminal.
Such a current mirror circuit is known from WO 00/31604. In the known circuit the transconductance stage generates a current which is divided over the first and the second semiconductor element, so that the input voltage is maintained close to a reference voltage. It is realised therewith that the input impedance is significantly decreased so that a large bandwidth is obtained However, in the known circuit the imput impedance depends relatively strongly on the current amplification factor of the first and second controllable semiconductor elements, which on its turn is dependent on the input current. As the source of the input current generally has a finite impedance, this entails that the bandwidth of the mirror circuit is dependent on the input current.
It is an object of the invention to provide a current mirror circuit according to the opening paragraph in which the dependence of the bandwidth on the input current is reduced. According to the invention the current mirror circuit is characterized in that the control electrodes are coupled to the common terminal via a third controllable semiconductor element, and in that the bias voltage source is coupled to the control electrodes of the first and the second controllable semiconductor element via a control electrode of the third controllable semiconductor element. At a low input current the current amplification factor of the first and the second controllable semiconductor element strongly reduces. This has the effect that a relatively large current flows via the control electrodes of these semiconductor elements. In the current mirror circuit of the invention the current via the control electrodes to the common terminal flows back via the third controllable semiconductor element, so that this effect is compensated. As a result the input impedance, and therewith the bandwidth is less dependent on the input current.
In a preferrable embodiment the interconnected control electrodes are further connected to a current source. This current source may serve at the same time to bias the third semiconductor element and to bias a component of the transconductance stage.
A further preferable embodiment is characterized in that the first and the second semiconductor elements have an area ratio 1:P. In that way the circuit operates as a current amplifier.
A still further preferable embodiment is characterized in that the first and the second semiconductor elements are bridged by a first and a second capacitive impedances having a capacitive value with a ratio of 1 to P. This measure further improves the bandwidth. The high frequency components generated by the transconductance stage are divided over the first and the second capacitive impedances in a ratio determined by the ratios of their capacitive values. As the ratios of the capacitive values corresponds to the area ratios of the controllable semiconductor elements a flat amplification-frequency characteristic is obtained over a large frequency range.
Another preferable embodiment of the invention is characterized in that the interconnected control electrodes are further connected via a third capacitive impedance and via a fourth controllable semiconductor element to a reference voltage, and that a control electrode of the fourth controllable semiconductor element is coupled to the common terminal. In the circuit of the invention the common terminal shows relatively large voltage variations. These may induce losses via stray capacitances. The auxiliary circuit formed by the third capacitive element and the fourth controllable semiconductor element achieves that these losses are compensated for, as a result of which the bandwidth is still further improved.
An integrated circuit according to the invention comprises at least one current mirror circuit according to the invention, and a photodiode having an output coupled to its current input terminal. The integrated photodiodes have a relatively small capacitance as compared to discrete photo diodes, which is also favorable for the bandwidth.
Such an integrated circuit is described in more detail in the ANNEX: “High-Bandwidth Low-Capacitance Integrated Photo Diodes for Optical Storage”.


REFERENCES:
patent: 4612497 (1986-09-01), Ulmer
patent: 5038114 (1991-08-01), Blanken et al.
patent: 5596297 (1997-01-01), McClure et al.
patent: 5834814 (1998-11-01), Ito
patent: 6323723 (2001-11-01), Gul et al.
patent: 6424204 (2002-07-01), Gul et al.
patent: WO0031604 (2000-06-01), None

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