Current-mirror circuit with buffering transistor

Details Current-mirror circuit with buffering transistor Current-mirror circuit with buffering transistor

1990-11-16

1992-01-07

Mottola, Steven

Amplifiers

With semiconductor amplifying device

Including current mirror amplifier

330300, H03K 316

Patent

active

050795180

ABSTRACT:
A current-mirror circuit includes a pair of NMOS transistors. The first NMOS transistor has a gate electrode, a drain electrode serving as a current input terminal of the current-mirror circuit and a source electrode connected to a preselected potential. The second NMOS transistor has a gate electrode connected to the gate electrode of the first NMOS transistor, a drain electrode serving as a current output terminal of the current-mirror circuit and a source electrode connected to the preselected potential. The current-mirror circuit is provided with a buffer circuit. The buffer circuit includes a bipolar transistor which is opposite in polarity to the paired NMOS transistors, i.e., a PNP bipolar transistor. This transistor is associated with a constant current source.

REFERENCES:
patent: 4473794 (1984-09-01), Early et al.
patent: 4574205 (1986-03-01), Nagano
"Analysis & Design of Analog Integrated Circuits", Chapter 4, pp. 197-211, 1977, (1st Edition), Gray & Meyer.

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