Current mirror circuit and current source circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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C323S316000

Reexamination Certificate

active

06388508

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a current mirror circuit suitable for use with a lower voltage power supply.
2. Description of Related Art
Current mirror circuits have previously comprised MOS (Metal Oxide semiconductor) transistor and used with various semiconductor circuits.
FIG. 1
illustrates static characteristics of an NMOS transistor. The horizontal axis indicates the drain source voltage V
ds
applied to an NMOS transistor and the vertical axis indicates the drain current I
d
. The relation between I
d
and V
ds
is shown as the gate source voltage V
gs
changes. The dotted line in
FIG. 1
represents a boundary of two regions that exist between I
d
and V
ds
. One region is on the left side of the dotted line is called the triode region, where I
d
is represented by equation I.
When (V
gs
−V
t
)>V
ds
,
I
d
=&bgr;[(
V
gs
−V
t
)
V
ds
−½
V
ds
2
]  (I)
Where, V
t
is threshold voltage of the MOS transistor.
The other region is on the right side of the dotted line and is called the pentode region, where I
d
is represented by equation II.
When (V
gs
−V
t
)<V
ds
,

I
d
=½&bgr;(
V
gs
−V
t
)
2
  (II)
The dotted line by which divides these two regions is represented by equation III.
V
gs
−V
t
=V
ds
  (III)
Moreover, when the conditions of equation IV occur, the NMOS transistor hardly allows current to flow.
V
gs
<V
t
  (IV)
A similar relationship also occurs in a PMOS transistor.
FIG. 2
shows a circuit where the two NMOS transistors M
0
and M
1
are connected, where the length of the gate and the width of the channel of both NMOS transistors M
0
and M
1
are equal.
Because the gate terminal and the drain terminal are short-circuited, the NMOS transistor M
0
operates within the range of the pentode region regardless of the current flow of constant current source
101
. The gate-source voltage of NMOS transistor M
1
is equal to the voltage the gate and the source of M
0
. Therefore, when the drain-source voltage is sufficiently high, NMOS transistor M
1
operates within the range of the pentode region. This circuit is called a current mirror circuit because it is used to make the drain current of NMOS transistor M
1
equal to the drain current of NMOS transistor M
0
.
In this current mirror circuit of related art, the current flowing in NMOS transistor M
1
decreases when drain-source voltage of the transistor M
1
decreases, and the transistor M
1
begins to operate in triode region. As a result, the current value that flows in NMOS transistor M
0
differs from that of NMOS transistor M
1
, and the current mirroring deteriorates.
Recently, semiconductor circuits have been required to operate on lower supply voltages. When current mirror circuits such as the one shown in
FIG. 2
operate on a lower supply voltage, the drain-source voltage of the NMOS transistor M
1
drops and the operation margin of the current mirror decrease.
In the pentode region,
V
gs
−V
t
<V
ds
  (V)
Then, it is possible to avoid this problem by lowering the threshold voltage of V
t
for M
0
and M
1
. However, the circuits having transistors which have a lowered threshold voltage are excessively costly to manufacture.
Moreover, the drain current of the pentode region is shown more accurately by the next expression.
When (V
gs
−V
t
<V
ds
),
I
d
=½&bgr;(
V
gs
−V
t
)
2
(1+&lgr;
V
ds
)  (VI)
where &lgr; is a fitting parameter.
Even if NMOS transistor M
1
operates in the pentode region, an accurate current mirroring cannot be obtained because the drain current of M
1
has dependency on the drain-source voltage. To address this problem the circuit shown in
FIG. 3
has been proposed. NMOS transistors are placed in series in order to suppress changes of the drain voltage of transistor M
11
, which mirrors the current. Decreasing operation margin associated with lower supply voltages has occurred since connecting a compensation means such as transistor M
11
to a mirror current in series and this technique runs counter to the trend of using lower voltages for semiconductor circuits.
SUMMARY OF THE INVENTION
One object of this present invention is to solve the above-mentioned problems of the prior art by providing a current mirror circuit that can increase the lower supply voltage operation margin of the current mirror operation, thereby obtaining an excellent current mirror circuit, even with a low-voltage power supply, and alleviating the drain-source dependency of the mirror current.
According to one aspect of the present invention, a circuit that provides an excellent mirror current that does not deteriorate, even when the power source becomes lower supply voltage. In a presently preferred embodiment, A mirror current flows in a first MOS transistor when a constant current flows in the MOS transistor from a current source. An operational unit outputs the difference between voltage V
g1
of the gate of the MOS transistor and voltage V
d1
of the drain, and applies this difference to the gate of a second MOS transistor. When the power-supply voltage of this circuit becomes lower and the absolute value of V
d1
decreases, the MOS transistors enter the triode region, and the mirror current decreases. When the absolute value of V
d1
decreases, because the difference between V
g1
and V
d1
becomes larger, the drain current of the second MOS transistor increases, and the amount by which the mirror current decreases is counterbalanced.


REFERENCES:
patent: 5982227 (1999-11-01), Kim et al.
patent: 6181191 (2001-01-01), Paschal

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