Current memory cell having bipolar transistor configured as a cu

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

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327 91, 327 93, 327 94, 327 96, 327432, 327433, 341153, 341134, 341136, 365 45, 365177, H03K 1700, G11C 2702, H03M 180

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active

057932310

ABSTRACT:
A current memory cell comprises a first bipolar transistor providing a current source and coupled to the emitters of a second and a third bipolar transistor, the latter forming the storage elements of the memory cell. The memory cell is calibrated, to avoid mismatch between the second and third transistors, by adjustment of the current source via a parallel arrangement of a resistor and a field effect transistor in the emitter circuit of the first transistor.

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H J Schouwenaars et al., "An oversampled Multibit CMOS D/A Conmverter", IEEE Journal of Solid State Physics, vol. 26, No. 12, Dec. 1991, pp. 1775-1780.
W Groeneveld et al., "Continuous Calibration D/A Conversion", Switched Currents an analogue technique for digital technology, Eds C Toumazou et al., IEE 1994, Chapter 15.

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