Electricity: power supply or regulation systems – Self-regulating – Using a three or more terminal semiconductive device as the...
Patent
1994-01-28
1995-01-24
Peckman, Kristine L.
Electricity: power supply or regulation systems
Self-regulating
Using a three or more terminal semiconductive device as the...
323907, G05F 304, G05F 308
Patent
active
053845293
ABSTRACT:
A current limiting circuit which includes a vertical MOS transistor as an output transistor has a clamping voltage that can be established with high accuracy, and once established, is less dependent on temperature. The gate of an output N-channel VDMOS transistor is connected to a constant-voltage circuit composed of an N-channel VDMOS transistor having the same characteristics as those of the output N-channel VDMOS transistor and two series-connected resistors which supply a divided voltage to the gate of the N-channel VDMOS transistor. The clamping voltage between the gate and source of the output N-channel VDMOS transistor can be adjusted based on the voltage divided by the resistors of the constant-voltage circuit. The temperature characteristics of the output N-channel VDMOS transistor and the constant-voltage circuit are held in phase with each other to reduce variations in the clamping voltage caused by temperature variations.
REFERENCES:
patent: 4527213 (1985-07-01), Ariizumi
patent: 4716356 (1987-12-01), Vyne et al.
patent: 4885525 (1989-12-01), Gontowski, Jr.
NEC Corporation
Peckman Kristine L.
To E.
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