Current-limited output buffer

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

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Details

C327S112000, C326S083000

Reexamination Certificate

active

07741882

ABSTRACT:
An output buffer circuit includes a first output transistor having a source terminal connected to a voltage supply and a drain terminal connected to an output node. The first output transistor is capable of coupling the output node to the voltage supply when the input signal is at a high voltage in the input voltage range. The circuit also includes a second output transistor having a drain terminal connected to the output node and a source terminal connected to ground. The second output transistor is capable of coupling the output node to ground when the input signal is at a low voltage in the input voltage range. The circuit further includes a current-limiting circuit coupled to a gate terminal of the first output transistor and capable of limiting a current flowing through the gate terminal when the first output transistor is turned on. The output node outputs an output signal in an output voltage range, wherein a high voltage of the output voltage range exceeds the high voltage of the input voltage range.

REFERENCES:
patent: 5900752 (1999-05-01), Mar
patent: 6459325 (2002-10-01), Hall et al.
patent: 6759880 (2004-07-01), Koch et al.
patent: 7400170 (2008-07-01), Bitting
patent: 2008/0308816 (2008-12-01), Miller et al.

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