Current limit technique for multiple-emitter vertical power tran

Details Current limit technique for multiple-emitter vertical power tran Current limit technique for multiple-emitter vertical power tran

1984-02-22

1985-08-06

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307254, 307299A, 307300, 307546, H03K 508, H03K 1708

Patent

active

045338450

ABSTRACT:
Circuitry is provided for current limiting the output current of a power substrate PNP transistor comprised of a plurality of emitters (e.g. 260). A resistor is placed between a fraction of the plurality of emitters (e.g. 8) and a source of supply voltage. When the power device is turned on, the current is drawn through the resistor causing a voltage drop thereacross. This voltage drop is monitored and when it reaches a certain level, a control signal is generated which ultimately results in limiting the conducted current of the power transistor.

REFERENCES:
patent: 3845405 (1974-10-01), Leidich

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