Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices
Patent
1991-04-16
1992-09-15
Hoff, Marc
Coded data generation or conversion
Analog to or from digital conversion
With particular solid state devices
341153, H03M 180
Patent
active
051481642
ABSTRACT:
A current generating device for generating two different currents having different magnitudes in response to corresponding one-bit data of digital data of a plurality of bits includes: NMOS transistors, (1,2,3), a control signal generating circuit and a supply circuit. The control signal generating circuit generates a voltage (V2) at which NMOS transistors (2,3) can be turned on and a voltage (V3) which is in the range between a ground potential and threshold values of the NMOS transistors and at which NMOS transistors (2,3) can be turned off. The supply circuit complementarily applies voltages (V1,V2) to NMOS transistors (2,3). NMOS transistor (1) generates a current with a predetermined magnitude. NMOS transistors (2,3) respond to voltages (V2, V3) to switch and allow/prevent passage of the predetermined-magnitude current generated by NMOS transistor (1).
REFERENCES:
patent: 4306225 (1981-12-01), Geller et al.
patent: 4712091 (1987-12-01), Schoofs et al.
patent: 4733218 (1988-03-01), Traa
patent: 5017919 (1991-05-01), Hull et al.
"A CMOS Triple 100-Mbit/s Video D/A Converter with Shift Register and Color Map", IEEE Journal of Solid-State Circuits, vol. SC-21, No. 6, by Kuang K. Chi et al., pp.989-996, Dec. 1986.
Kumamoto Toshio
Nakamura Yasuyuki
Hoff Marc
Mitsubishi Denki & Kabushiki Kaisha
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