Current feedback amplification circuit and associated process

Details Current feedback amplification circuit and associated process Current feedback amplification circuit and associated process

2000-06-06

2002-04-23

Pascal, Robert (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including current mirror amplifier

C330S265000, C348S707000

Reexamination Certificate

active

06377126

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims priority from prior French Patent Application No. 99-07150, filed Jun. 7, 1999, the entire disclosure of which is herein incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of amplifiers, especially those used in the field of video.
2. Description of Related Art
There are two popular types of amplifiers used in the field of video, voltage feedback amplifiers and current feedback amplifiers. Voltage feedback amplifiers comprise two high-impedance inputs, into one of which, a voltage tapped off at the output is reinjected back into the input. However, this type of amplifier has a relatively limited slew rate, especially by virtue of the bias currents of each branch which must charge the capacitors present in the circuit.
Amplifiers with current feedback have a high-impedance input into which is the data signal is received and a low-impedance input into which a current tapped off at the output is reinjected. These amplifiers have a high slew rate by virtue of the possibility of reinjecting a large output current.
An exemplary embodiment of a prior art amplifier with current reinjection is illustrated in FIG.
1
. The circuit comprises two current mirrors
1
and
2
provided respectively with an input
1
a
,
2
a
and with an output
1
b
,
2
b
. Each current mirror
1
,
2
is capable of outputting a current proportional to the input current. The proportionality factor is equal for the two mirrors
1
and
2
and denoted K. Between the inputs
1
a
and
2
a
of the current mirrors
1
and
2
are arranged in series a PNP type bipolar transistor
3
and an NPN type bipolar transistor
4
. The collector of the transistor
3
is linked to the input
1
a
and the emitter of transistor
3
is linked to the collector of the transistor
4
. The emitter of the transistor
4
is linked to the input
2
a
. Two diodes
5
and
6
are arranged in series between the base of the transistor
3
and the base of the transistor
4
. The input of the circuit into which the signal to be amplified is injected is linked to the common point between the diodes
5
and
6
. A current source
7
is also linked to the base of the transistor
3
, and a current source
8
is linked to the base of the transistor
4
. The current sources
7
and
8
deliver an identical current denoted
10
serving to bias the diodes
5
and
6
.
The outputs
1
b
and
2
b
of the current mirrors
1
and
2
are short-circuited and linked to the input of an amplifier
9
, in general of unity gain whose output forms the output of the amplifier circuit and whose role is to deliver a low output impedance. Capacitors
10
and
11
are arranged in series between the current mirror
1
and the current mirror
2
, their common point being linked to the input of the amplifier
9
. Finally, the emitter of the bipolar transistor
3
is on the one hand linked to ground by way of an external resistor R
12
and on the other hand to the output of the current amplifier
9
by way of an external resistor R
13
. The inputs
1
a
and
2
a
of the current mirrors
1
and
2
deliver a current I
O
. The outputs
1
b
and
2
b
deliver a current K×I
O
. The operation of the circuit can be modeled by the following equations:
Denoting by G
0
the gain of the feedback loop, yields:
G
0
=1+R
13
/R
12
.
The −3 db cutoff frequency is equal to:
F
3db
=K/(2×p×R
13
×C)
with C the sum of the values of the capacitors
10
and
11
, the capacitor
11
and the capacitor
10
having equal values.
Combining the equations for G
0
and F
3db
, the cutoff frequency
F
C
=F
−3db
/(1+r
0
×Go/R
13
)
with r
0
the input resistance of the transistors
3
and
4
seen with a small signal:
r
0
=u
t
/(2×Io)
u
t
being a constant equal to 26 mV at 27° C. with u
t
=(k×T)/q, k being Boltzmann's constant, T the temperature in Kelvin and q the charge on the electron.
The complex transimpedance of the circuit equal to the ratio of an output voltage variation to an input current variation is expressed as follows: T
Z
=&Dgr;V
S
/&Dgr;I=K×R
HZ
, the term R
HZ
being the input resistance of the feedback loop seen from the input of the amplifier
9
, with R
HZ
=V
EA
/(K×Io), with V
EA
a characteristic voltage of the transistors
3
and
4
and which is the theoretical voltage for which the collector current would be zero, this voltage being obtained by extending the straight parts of the curves representative of the collector current as a function of the voltage between the collector and the emitter, which voltage is called the Early voltage. Accordingly, T
Z
=V
EA
/Io. Thus, it may be seen that the complex transimpedance of the circuit is independent of the factor K and depends only on the characteristics of the transistors
3
and
4
and on the current I
O
. To increase the complex transimpedance, one must therefore try to decrease the current I
O
. If I
O
deceases, then r
0
increases since
r
0
=u
t
/(2×Io)
Now, the cutoff frequency
F
C
=F
−3db
/(1+r
0
×Go/R
13
)
To keep F
C
the same, R
13
would have to be increased.
The slew rate denoted SR is governed by the following equation:
SR=K×&Dgr;V
S
/R
13
/C
If the resistance R
13
is increased, then the slew rate decreases. If the value C of the capacitors
10
and
11
is decreased, then the stray capacitances of the transistors which exhibit nonlinear characteristics become predominant, thereby tending to exacerbate the distortion of the signal.
Accordingly, what is needed is a circuit that overcomes the shortcomings of above and to provide an amplifier with improved distortion, transimpedance and output excursion while keeping r
0
, R
13
, and hence f
0
and SR the same.
SUMMARY OF THE INVENTION
The electronic circuit, according to the invention, comprises a first and a second current mirrors, an upstream active element arranged between an input of the first current mirror and an input of the second current mirror, each current mirror being provided with an output. The circuit comprises a first current source arranged in parallel with the input of the first current mirror and a second current source arranged in parallel with the input of the second current mirror, so that the current delivered to the active element is equal to the output current of each current mirror and that the input current of each current mirror is less than the current delivered to the active element by the input of each current mirror and by the associated current source.
In one embodiment of the invention, the circuit forms a current feedback amplifier.
Advantageously, the circuit comprises a downstream element arranged between an output of the first current mirror and an output of the second current mirror. The upstream active element and the downstream element may be connected externally, in particular by way of a first resistor arranged between the output of the upstream active element and the output of the downstream element, a second external resistor being arranged between the output of the upstream active element and ground.
In one embodiment of the invention, the downstream element comprises a pair of capacitors mounted in series between the outputs of the first and of the second current mirrors.
In one embodiment of the invention, the downstream element comprises an amplifier of the unity gain whose input is linked directly to the outputs of the first and of the second current mirrors, so that the circuit exhibits low output impedance. The input of the amplifier can, moreover, be linked to the point common to the two capacitors.
Advantageously, the upstream active element comprises two transistors mounted in series between the inputs of the two current mirrors.
The circuit can comprise two biased diodes mounted in series between the bases of the said two transistors, the common point between the diodes

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