Current differential amplifier circuit

Details Current differential amplifier circuit Current differential amplifier circuit

1996-09-30

1998-10-13

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

327 55, 327 57, G11C 706, H03K 3356

Patent

active

058217924

ABSTRACT:
A current differential amplifier circuit comprises first and second pMOS transistors (P11 and P12) connected between a power supply and a first node (W11 ); third and fourth pMOS transistors (P13 and P14) connected between the power supply and a second node (W12); a fifth pMOS transistor (P15) connected between gates of the second and the third pMOS transistors (P12 and P13), each of the gates connected to its opposite node (W11 or W12 ); a first nMOS transistor (N16) connected between the first node (W11 ) and a first current source (I11 ) and having its gate connected to the second node (W12); and a second nMOS transistor (N17) connected between the second node (W12) and a second current source (I12) and having its gate connected to the first node (W11). Pre-charge signal (/PC) is applied to the gates of the first, fourth and the fifth pMOS transistors (P11, P14 and P15) and comparison results are derived from either the first node (W11) or the second node (W12).

REFERENCES:
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patent: 5438543 (1995-08-01), Yoon
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patent: 5604705 (1997-02-01), Ackland et al.
patent: 5615161 (1997-03-01), Mu
Baker et al, "A 3.3V 16 Mb Flash Memory with Advanced Write Automation", IEEE, ISSCC Slide Supplement, 1994, pp. 112-113, 276.

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