Current DAC code independent switching

Details Current DAC code independent switching Current DAC code independent switching

2003-01-24

2004-07-27

Jeanglaude, Jean Bruner (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

C327S408000

Reexamination Certificate

active

06768438

ABSTRACT:

FIELD OF THE INVENTION
The invention generally relates to electronic signal processing, and more specifically, to digital to analog signal conversion.
BACKGROUND ART
A current steering digital-to-analog converter (DAC) converts a digital data stream input into a corresponding analog signal output.
FIG. 1
shows a portion of a typical current steering DAC
100
in which a digital data stream is applied to a synchronous digital output latch
101
. “Synchronous” means that the data on the latch input is transferred to the output in response to triggering of the latch by a clocking signal In real world applications, considerable digital processing is involved in producing such a digital data stream, but in the context of a DAC, such preceding digital circuitry need not be described. When the latch
101
is clocked, the data present on the D-input is transferred to the Q output, and its complement is transferred to the Q-bar output.
The outputs of latch
101
asynchronously control switch drivers
102
, which in turn control differential switching elements
103
that control a constant current source supplied from a common source node. “Asynchronously” means that the logic state of the outputs of the switch drivers
102
and the differential switching elements
103
change state in response to their inputs changing state rather than in response to a clocking signal. For a given logic state present on the output of the latch
101
, one switch of the differential switching elements
103
will be on, and the other will be off. When the logic state on the output latch
101
changes, the on-off states of the differential switching elements
103
also change correspondingly. Whichever differential switching element
103
is on provides a current path for constant current source
104
through one of the analog output resistors
105
. Thus, an analog signal output signal is developed at output terminals
106
.
In theory, such a current steering DAC
100
can operate at any frequency to provide an analog output corresponding to the digital data input. In the real world, errors and noise occur throughout the system, the effects of which increase with operating frequency. These effects may be code dependent and may result in harmonic distortion and harmonic spurs in the analog output signal.
One approach to reducing code dependent noise is presented by
FIG. 8
of U.S. Pat. No. 6,344,816, which describes adding an additional clocked circuit called a “dummy latch” in parallel with the output latch
101
. The output of the dummy latch is not itself used in any way, rather the dummy latch and the output latch
101
are connected and operated such that with every cycle of the clocking signal, one of the latches will change state and the other will not. Thus, if the output latch
101
changes state with the data signal, the dummy latch maintains its logic state, and if the output latch
101
maintains its logic state constant with an unchanging data signal, then the dummy latch will change logic states. According to the '816 patent, this arrangement maintains a constant loading on the clocking signal that is independent of the data signal logic state. There is no suggestion in the '816 that its teaching might be extensible beyond its focus on the clocking signal.
SUMMARY OF THE INVENTION
A representative embodiment of the present invention includes a method and device for code independent switching in a digital-to-analog converter (DAC). In the DAC shown in
FIG. 1
, if the switch drivers
102
can completely settle for every data transition from latch
101
, the switching characteristics will be constant for the differential switching elements
103
. As the output frequency increases, the differential switching elements
103
are switched faster, requiring the switch drivers
102
to settle in a shorter time. If the switch drivers
102
do not settle to the same value each time, the switching characteristics may vary and code dependent distortion will result. Embodiments of the present invention avoid such code dependent distortion.
A synchronous digital circuit is triggered by a clocking signal and develops a digital data signal. A current steering circuit has a common source node for supplying current, and develops an analog output signal representative of the digital data signal. Any switching disturbances at the common source node are substantially data independent.
In a further embodiment, the current steering circuit contains multiple switching elements arranged so that a constant number of switching elements change conduction state with every cycle of the clocking signal. In addition or alternatively, the current steering circuit may receive the digital data signal as a first input and an auxiliary data signal as a second input. The auxiliary data signal changes logic state when: (i) triggered by the clocking signal, and (ii) the digital data signal does not change logic state.
In another embodiment, the current steering circuit includes (i) a switch driver circuit for developing a switch control signal representative of the digital data signal, and (ii) a differential switching circuit responsive to the switch control signal for switching the current from the common source node to develop the analog output signal.
The current steering circuit may use a single switching element for developing the analog output signal.
A representative embodiment of the present invention also includes a method and device for code independent switching in a digital-to-analog converter (DAC). A synchronous digital circuit is triggered by a clocking signal and develops a digital data signal. A current steering circuit has a common source node for supplying current, and develops an analog output signal representative of the digital data signal. The current steering circuit has multiple switching arrangements arranged so that a constant number of switching elements change conduction state with every cycle of the clocking signal.
In a further such embodiment, the current steering circuit receives the digital data signal as a first input and an auxiliary data signal as a second input, the auxiliary data signal changing logic state when: (i) triggered by the clocking signal, and (ii) the digital data signal does not change state.
In another embodiment, the current steering circuit includes: (i) a switch driver circuit for developing a switch control signal representative of the digital data signal, and (ii) a differential switching circuit responsive to the switch control signal for switching the current from the common source node to develop the analog output signal.


REFERENCES:
patent: 4056740 (1977-11-01), Schoeff
patent: 5148165 (1992-09-01), Phillips
patent: 5343196 (1994-08-01), Harston
patent: 5909187 (1999-06-01), Ahuja
patent: 6344816 (2002-02-01), Dedic
patent: 6369734 (2002-04-01), Volk
patent: 6621438 (2003-09-01), Hong
patent: 2002/0190778 (2002-12-01), Curry et al.
patent: 2003/0043062 (2003-03-01), Dedic et al.
Curry et al., “Apparatus and method for minimizing spurious noise in switched current steering architectures”, US patent application No. 09/934,775, filed on Aug. 21, 2001.*
Park, S., et al, “A Digital-to-Analog Converter Based on Differential-Quad Switching”,IEEE Journal of Solid-State Circuits,vol. 37, No. 10, Oct. 2002.

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