Current crowding reduction technique using selective current...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

Reexamination Certificate

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C257S773000, C257S778000, C257S786000, C257S780000, C257S781000, C257S784000, C257S698000

Reexamination Certificate

active

06897563

ABSTRACT:
A technique for reducing current crowding on a bump using selective current injection is provided. The technique allows a bump to more uniformly inject current around the bump from vias on a metal layer, where the vias are concentrated on outer regions of the metal layer and have higher via density than that of a central region of vias on the metal layer. Because vias are concentrated on the outer regions of the metal layer, higher current distribution density along current flow paths from the outer regions to the bump compensates for a shorter current path length from the central region to the bump, thus effectively reducing current crowding on the bump. Further, a technique for selectively positioning regions of vias on a metal layer in order to reduce current crowding on a bump is provided.

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patent: 6313537 (2001-11-01), Lee et al.
patent: 6365970 (2002-04-01), Tsai et al.
patent: 6566758 (2003-05-01), Trivedi et al.

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