Current control circuit for a reluctance machine

Electricity: motive power systems – Switched reluctance motor commutation control

Reexamination Certificate

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Details

C318S701000

Reexamination Certificate

active

06181092

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to control circuits for reluctance machines and more particularly, but not exclusively, to control circuits for switched reluctance machines. In particular, the present invention relates to an improved control circuit for a switched reluctance machine in which a pulse width modulated signal is used to control both the average magnitude of the current in the phase winding and the frequency at which the power switching devices coupled to the phase windings are switched.
BACKGROUND OF THE INVENTION
In many prior art motor control systems, pulse width modulated (or “PWM”) control signals are used to provide signals indicative of the desired speed or torque of the motor. In known control systems, the PWM signal is often used to provide a signal representative of the magnitude of an analog quantity. PWM reference signals are used because they are easily generated by digital circuits, such as ASICs, microprocessors and the like, that are used in modern control systems. Furthermore, the digital nature of a PWM signal means that it can easily be passed across an isolation barrier (e.g. using optical means) with minimal corruption.
In many known current control systems, current feedback is used to maintain the desired motor current and operate the power switching circuits. In these systems, the power switches are typically operated such that the motor current is proportional to an analogue current reference signal. This reference may conveniently originate as a digital PWM signal in an ASIC or microprocessor, the required analogue voltage being obtained by low-pass filtering. One exemplary current controlled system of this type for a switched reluctance machine is illustrated in FIG.
1
.
FIG. 1
generally illustrates a current control circuit for a single phase of a switched reluctance machine. As those working in the area of switched reluctance motor and control circuit design will recognize, the illustrated circuitry will typically be repeated for each phase of the machine. For the sake of clarity, not all the details of the circuit components are shown. These, however, would be readily assumed by one skilled in the art.
In the circuitry illustrated in
FIG. 1
, a relatively low voltage PWM current reference signal representing the desired magnitude of the peak motor phase current is received at node
10
. This signal is typically generated by an ASIC, microprocessor or similar digital control circuit. In many prior art applications, the frequency of the pulses that comprise the relatively low voltage PWM current reference signal is constant, e.g., 16 kHz, and the width of the pulses is varied in proportion to the desired current. Typically, the width of the pulses comprising the low voltage PWM current reference signal is adjusted such that the average value of the PWM current reference signal (i.e., its DC component) represents the magnitude of the desired peak phase current.
The electrical components in most known motor control systems can be divided into two groups: control electronics and power electronics. The control electronics typically generate the control signals for the motor and normally operate on and from relatively low voltage signals and supplies (up to 25 Volts). Nevertheless, because of the need to couple elements of the control circuitry to the high-voltage power electronics, some of the control components may operate at high common mode voltages. The power electronics typically control the application of electric power to the motor and operate on and from voltages that may range into the hundreds of volts. In
FIG. 1
, the components within the broken line box comprise the power electronics and those components of the control electronics which are at high common mode voltages.
To prevent the high voltages and currents associated with the power electronics from interfering with the control electronics, and to isolate the user (who may come into contact with the control electronics) from dangerous voltages, many known circuits use elements known as “isolators”, such as opto-isolators. These isolators provide a barrier between those components at high common mode potential and the remainder of the system. One such isolator is illustrated as element
15
in FIG.
1
. It will be understood that means other than optical could be used, e.g. transformer isolation.
Referring to the circuitry of
FIG. 1
, the PWM reference signal is transmitted across the isolator
15
to the high voltage power electronics portion of the circuit. The filtering network
12
converts the PWM current reference signal into an analog voltage signal which varies in direct relation to the width of the pulses that comprise the PWM reference current signal. The analog signal from filter
12
corresponds to the peak magnitude of the desired current. That signal is applied as one input to a comparator
16
. The other input to comparator
16
is a voltage taken from a first terminal of a resistor
17
that is placed in series with switching devices
8
and
23
and phase winding
24
. When switching devices
8
and
23
are closed, the phase winding
24
is coupled to a power source with a voltage +V and current will flow through the phase winding
24
. The voltage at the first terminal of resistor
17
corresponds to and follows the magnitude of the current in the phase winding
24
.
Comparator
16
compares the voltage from filter
12
(which corresponds to the desired current) with the voltage at the first terminal of resistor
17
(which corresponds to the phase current) and generates an output signal that indicates whether the sensed phase current is greater than or less than the desired current. The output signal from comparator
16
is then transmitted back across the isolation barrier by isolator
18
and is applied as one input to a three-input AND gate
21
and as one input to a minimum off-timer
20
. The minimum off-timer
20
is an electronic timing device that produces a logic low signal at its output for a predetermined period of time in response to a change in its input from a logic high value to a logic low value. After the predetermined time has passed, the output of the minimum off-timer
20
will rise to a logic high signal.
The output of comparator
16
, minimum off-timer
20
and AND gate
21
operate together to control the current in the phase winding
24
as follows. When it is appropriate to energize the phase winding
24
, an enable signal is provided as one input to the three-input AND gate
21
. Typically, at the time the enable signal is provided, the other two inputs to the AND gate
21
will also be logic high. Accordingly, the output of logic gate
21
will be logic high. This logic high signal is then transmitted across the isolation barrier by isolator
22
and that signal turns ON switching devices
8
and
23
, coupling the phase winding
24
to the power source +V. At this time the current in the phase winding
24
will begin to rise and the voltage at the first terminal of resistor
17
will begin to increase. When comparator
16
determines that the current in the phase winding is greater than the desired current, it will produce a logic low signal that, when transmitted across the isolation barrier by isolation device
18
, will both render the output of AND gate
21
a logic low (thus turning off switching devices
8
and
23
) and render the output of the minimum off-timer
20
logic low for the predetermined period of time. After the minimum off-timer times out (typically after 20-30 microseconds) the current in the phase winding typically will have dropped below the desired current, and the cycle will repeat during the period the enable signal for the appropriate phase is logic high.
While the known circuitry of
FIG. 1
can be used to control a switched reluctance machine, it suffers from several disadvantages. For example, because of the need to isolate part of the control circuitry from the power circuitry, the control system illustrated in
FIG. 1
requires three isolating devices
15
,
18
and

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