Current confinement via defect generator and hetero-interface in

Details Current confinement via defect generator and hetero-interface in Current confinement via defect generator and hetero-interface in

1995-12-01

1998-11-03

Fahmy, Wael

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Field effect transistor

257187, 257751, H01L 310328, H01L 310336, H01L 2348

Patent

active

058312951

ABSTRACT:
A semiconductor device including a plurality of layers of material defining a diffusion barrier. A defect generator positioned on the plurality of layers in overlying relationship to the diffusion barrier so as to produce a collection of defects at the diffusion barrier that operates as a current restriction. In a typical example, an ohmic contact is positioned around the mesa of a ridge VCSEL, which ohmic contact generates defects that accumulate at a hetero-interface near the active area and confine the current flow to a lasing volume of the VCSEL.

REFERENCES:
patent: 5049951 (1991-09-01), Goronkin et al.
patent: 5256596 (1993-10-01), Ackley et al.
patent: 5468656 (1995-11-01), Shreh et al.
patent: 5514606 (1996-05-01), Hashemi et al.

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