Current confinement, capacitance reduction and isolation of...

Coherent light generators – Particular resonant cavity – Distributed feedback

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C372S046012, C372S050121

Reexamination Certificate

active

06738409

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
Not applicable.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to current confinement and isolation in vertical cavity surface emitting lasers.
2. Discussion of the Related Art
Vertical cavity surface emitting lasers (VCSELs) represent a relatively new class of semiconductor lasers. While there are many variations of VCSELs, one common characteristic is that they emit light perpendicular to a wafer's surface. Advantageously, VCSELs can be formed from a wide range of material systems to produce specific characteristics. In particular, the various material systems can be tailored to produce different laser wavelengths, such as 1550 nm, 1310 nm, 850 nm, 670 nm, and so on.
VCSELs usually include semiconductor active regions, distributed Bragg reflector (DBR) mirrors, spacers, current confinement structures, substrates, and contacts. Because of their relatively complicated structure and because of their material requirements, VCSELs are usually grown using metal-organic chemical vapor deposition (MOCVD).
FIG. 1
illustrates a typical VCSEL
10
. As shown, an n-doped gallium arsenide (GaAS) or an indium phosphorus (InP) substrate
12
has an n-type electrical contact
14
. An n-doped lower mirror stack
16
(a DBR) is on the substrate
12
, and an n-type graded-index lower spacer
18
is disposed over the lower mirror stack
16
. An active region
20
, usually having a number of quantum wells, is formed over the lower spacer
18
. A p-type graded index top spacer
22
is disposed over the active region
20
, and a p-type top mirror stack
24
(another DBR) is disposed over the top spacer
22
. Over the top mirror stack
24
is a p-type conduction layer
9
, a p-type cap layer
8
, and a p-type electrical contact
26
.
Still referring to
FIG. 1
, the lower spacer
18
and the top spacer
22
separate the lower mirror stack
16
from the top mirror stack
24
such that an optical cavity is formed. As an optical cavity is resonant only at specific wavelengths, the mirror separation is controlled to resonant at a predetermined wavelength (or at a multiple thereof). At least part of the top mirror stack
24
includes an insulating region
40
that provides current confinement. The insulating region
40
is usually formed either by implanting protons into the top mirror stack
24
, or by forming an oxide layer. Either way, the insulating region
40
defines a conductive annular central opening
42
. Thus, the central opening
42
forms an electrically conductive path though the insulating region
40
to the active region.
In operation, an external bias causes an electrical current
21
to flow from the p-type electrical contact
26
toward the n-type electrical contact
14
. The insulating region
40
and the conductive central opening
42
confine the current
21
such that it flows through the conductive central opening
42
and into the active region
20
. Some of the electrons in the current
21
are converted into photons in the active region
20
. Those photons bounce back and forth (resonate) between the lower mirror stack
16
and the top mirror stack
24
. While the lower mirror stack
16
and the top mirror stack
24
are very good reflectors, some of the photons leak out as light
23
that travels along an optical path. Still referring to
FIG. 1
, the light
23
passes through the p-type conduction layer
9
, through the p-type cap layer
8
, through an aperture
30
in the p-type electrical contact
26
, and out of the surface of the vertical cavity surface emitting laser
10
.
It should be understood that
FIG. 1
illustrates a typical VCSEL, and that numerous variations are possible. For example, the dopings can be changed (say, by providing a p-type substrate
12
), different material systems can be used, operational details can be tuned for maximum performance, and additional structures, such as tunnel junctions, can be added.
While generally successful, VCSELs have problems. For example, in some material systems producing an insulating region
40
using either proton implantation or oxide isolation is not practical. Implanted ions do not produce suitable trap levels while oxide layers are difficult to implement. These problems are particularly apparent in long wavelength VCSELs, and especially in long wavelength VCSELs arrays. Not only do long wavelength VCSELs require current confinement, but low capacitance and easy manufacturing are also required. With VCSEL arrays it is important to isolate the individual VCSEL elements. Typically, current confinement and isolation in long wavelength VCSELs are produced using either a patterned tunnel junction, which has high capacitance, or an undercut etch, which does not lend itself to easy manufacturing.
The transition metals and oxygen are good sources of deep traps that are not related to the implant damage, but are related to the element themselves. In particular, Cr, and Fe have been used to dope during growths of GaAs and InP substrates and epilayers so as to obtain semi-insulating behavior. Cr is used more in GaAs while Fe more in InP. Oxygen has been implanted in several kind of devices, including GaAs based VCSELs, for isolation and current guiding. However, it has not been used in InP based VCSELs.
Therefore, a VCSEL having a new current confinement structure would be beneficial. Even more beneficial would be a new current confinement structure that has low capacitance and that is easy to manufacture. Also beneficial would be a new current confinement structure that has low capacitance, that is easy to manufacture, and that provides good isolation between VCSEL elements in a VCSEL array.
SUMMARY OF THE INVENTION
The following summary of the invention is provided to facilitate an understanding of some of the innovative features unique to the present invention, and is not intended to be a full description. A full appreciation of the various aspects of the invention can be gained by taking the entire specification, claims, drawings, and abstract as a whole.
Accordingly, the principles of the present invention are directed to a VCSEL having a new current confinement structure. Those principles further provide for a current confinement structure that has low capacitance and that is easy to manufacture. A current confinement structures according to the principles of the present invention can also provide good isolation between VCSEL elements in a VCSEL array.
A VCSEL according to the principles of the present invention includes a current confinement structure formed from deep traps in a top DBR mirror and/or in a top spacer. Isolation between VCSEL elements in a VCSEL array can be provided by extending the deep traps into an active layer. The deep traps are produced by implanting transition metals, for example Fe or Cr into a III-V substrate (such as Inp or GaAs). The energy and dosage used when implanting can be tailored to control the lateral sheet resistance and/or the isolation. Furthermore, the implants beneficially extend over a significant depth, thereby reducing the capacitance across the resulting VCSEL.
The elements that are suitable for implantation include Ti, V, Cr, Mn, Fe, Co, Ni, Zr, Nb, Mo, Tc, Ru, Rh, Pd Ag, Hf, Ta, W, Re, Os, Ir, Pt, Au. The preferred subset (because of their abundance and known characteristics) includes Ti, V, Cr, Mn, Fe, Co, Ni. In addition, oxygen is well suited to implantation. Elements which may work include numbers 58-71, and 90-103.
Beneficially, after implanting deep elemental traps to make a material semi-insulating, an implant anneal is performed. Such annealing is typically performed between 700 and 950 C., with a longer annealing time being used at lower temperatures.
The novel features of the present invention will become apparent to those of skill in the art upon examination of the following detailed description of the invention or can be learned by practice of the present invention. It should be understood, however, that the detailed description of the invention and the specific examples presented, whi

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Current confinement, capacitance reduction and isolation of... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Current confinement, capacitance reduction and isolation of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Current confinement, capacitance reduction and isolation of... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3252227

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.