Current comparator

Details Current comparator Current comparator

1999-12-13

2001-08-14

Ton, My-Trang Nu (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S088000

Reexamination Certificate

active

06275075

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a comparator, and in particular to a comparator that generates a digital output signal in accordance with an input signal.
2. Background of the Related Art
Current-mode operations have been considered as an alternative in analog circuit designs with high speed and/or low power consumption VLSI technology. Comparators have been, and are still, an important building block in electronic systems including data o converters and other front-end signal processing applications.
FIG. 1
shows a circuit of a related art current comparator disclosed in Electronics Letters, Jan. 6, 1994 Vol. 30 No. 1. As shown in
FIG. 1
, MOS transistors M
1
and M
2
form a class B voltage buffer, and MOS transistors M
3
to M
6
form two inverting amplifiers. IIN is an input current, which is the difference between an input signal and reference currents. The inverting amplifiers have three modes of operation.
First, when the input current IIN is positive, voltage V
1
at a node 1 pulled high level. This high level voltage V
1
is inverted and amplified by a PMOS transistor M
3
and an NMOS transistor M
4
, which causes voltage V
2
at a node 2 to go low level. As gate-source voltage VGS
1
of the NMOS transistor M
1
and gate-source voltage VGS
2
of the PMOS transistor M
2
are negative, the NMOS transistor M
1
is turned off and the PMOS transistor M
2
is turned on. In this state, the node 1 is a low impedance node.
When the sign of input current IIN is changed (i.e., a direction of the current IIN is changed), there is insufficient gate drive for the buffer to supply input current IIN, because the NMOS transistor M
1
and the PMOS transistor M
2
of the buffer are not perfectly in on/off states, respectively. Thus, the node 1 is temporarily a high impedance node.
When the input current IIN is negative, the voltage V
1
is pulled low level and the voltage V
2
is pulled high level, turning the NMOS transistor M
1
on and the PMOS transistor M
2
off, the node 1 is low impedance again. The width of this deadband region in the transfer characteristics of the voltage buffer M
1
and M
2
is determined by the threshold voltage of M
1
and M
2
, and a response time of the comparator increases, as the input current IIN decreases.
The current comparator in
FIG. 1
reduced the deadband region by changing the biasing scheme of M
1
and M
2
from class B to class AB operation. The class AB operation results in smaller voltage swings at node 1 and node 2, and hence faster response times. However, the current comparator requires a complicated bias circuit of class AB to reduce the deadband region, which increases power consumption. Therefore, the current comparator uses nonlinear positive feedback to enhance the response time achieved at the expense of sensitivity and power consumption. The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a current comparator that substantially obviates one or more of the problems caused by limitations and disadvantages of the related art.
Another object of the present invention is to provide a current comparator that reduces both input and output resistance by placing a resistive feedback network in a first inverting amplifier of an input stage.
Another object of the present invention is to provide a current comparator that generates a digital output signal according to an input signal.
Another object of the present invention is to provide a current comparator that generates a digital output signal according to a sign of an input current signal.
To achieve these and other objects and advantages in a whole or in parts and in accordance with the purpose of the present invention, as embodied and broadly described, a current comparator according to the present invention includes first and second input terminals, an output terminal, a reference current source that supplies a reference current to the first input terminal, a load circuit that supplies a first current to the output terminal, wherein the load circuit is coupled to the first input terminal and the first current is substantially equal to the reference current, a driving circuit that generates an output voltage by controlling the first current according to an input current applied to the second input terminal, and a resistor coupled between the driving circuit and the output terminal.
To further achieve the above objects in a whole or in parts, a current comparator according to the present invention includes a first inverting amplifier that includes first and second input terminals, an output terminal, a reference current source that supplies a reference current to the first input terminal, a load circuit that supplies a first current to the output terminal, wherein the load circuit is coupled to the first input terminal and the first current is substantially equal to the reference current, a driving circuit that generates an output voltage having a prescribed level by controlling the first current according to an input current applied to the second input terminal, and a resistor coupled between a control terminal of the driving circuit and the output terminal, and a second inverting amplifier that includes a pull-up transistor, and a pull-down transistor, wherein the pull-up transistor and the pull-down transistor are coupled in series between first and second prescribed voltages, and wherein the pull-up transistor is controlled by the reference current, wherein the pull-down transistor is controlled by the output voltage at the output terminal of the first inverting amplifier.
To further achieve the above objects in a whole or in parts, a comparator according to the present invention includes first and second input terminals, an output terminal, a reference current source that supplies a reference current to the first input terminal, an input current source that supplies an input current to the second input terminal, and a resistive circuit coupled between the first input terminal, the second input terminal and the output terminal that provides an output voltage to the output terminal according to the input current and the reference current.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.


REFERENCES:
patent: 4287570 (1981-09-01), Stark
patent: 4418290 (1983-11-01), Nagano
patent: 4464591 (1984-08-01), Rapp
patent: 5446397 (1995-08-01), Yotsuyanagi
patent: 5477170 (1995-12-01), Yotsuyanagi
patent: 5627494 (1997-05-01), Somerville
patent: 5748534 (1998-05-01), Dunlap et al.

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