Current cell type digital-to-analog converter

Details Current cell type digital-to-analog converter Current cell type digital-to-analog converter

2006-06-27

2006-06-27

Vuong, Quochien B. (Department: 2685)

Telecommunications

Transmitter and receiver at same station

Convertible

C341S126000, C341S144000

Reexamination Certificate

active

07068978

ABSTRACT:
The current cell matrix includes 63 upper current cells and one lower current cell. Each of the current cells has 4 constant current transistors having the same size with respect to each other. The upper current cell outputs drain currents of all the constant current transistors when the cell is selected by the upper decoder. The lower current cell outputs drain currents of none, one or two constant current transistors in accordance with the select signal from the lower decoder. The analog output terminal combines and outputs the currents of the selected constant current cells. The current cell type digital-to-analog converter has the decreased differential linearity error and the decreased integral linearity error.

REFERENCES:
patent: 5162800 (1992-11-01), Ogawara
patent: 5574455 (1996-11-01), Hori et al.
patent: 6275179 (2001-08-01), Mori
patent: 6346901 (2002-02-01), Aiura et al.
patent: 6683549 (2004-01-01), Kinugasa
patent: 01-19474 (1989-01-01), None
patent: 01-268316 (1989-10-01), None
patent: 04-042619 (1992-02-01), None
patent: 05-191290 (1993-07-01), None
patent: 11-17545 (1999-01-01), None
Japanese Office Action for Application No. JP-2003-116996 dated Jul. 20, 2004.

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