Current biasing circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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C327S543000, C323S315000

Reexamination Certificate

active

06255897

ABSTRACT:

FIELD OF THE INVENTION
The present invention is directed toward a current biasing circuit and, more particularly, a current biasing circuit compensating for changes in device parameters.
BACKGROUND OF THE INVENTION
Current biasing circuits, or “current mirror” circuits, are generally well known. Current mirrors generally use transistors, FETs (Field-Effect Transistors) or BJTs (Bipolar Junction Transistors), to produce a controlled current in a “biased” device as a multiple of a reference current that flows in a “reference” device. In an ideal case, the multiplying factor depends only upon the geometrical properties of the reference and the biased device.
Current mirrors constructed of conventional transistor devices should come close to the ideal case, where the physical geometry of the transistors is the sole factor influencing errors. Transistors typically used in current mirror devices include MOSFET (Metal Oxide Semiconductor Field-Effect Transistor), MESFET (Metal Semiconductor Field-Effect Transistor), HEMT (High-Electron-Mobility Transistor) and PHEMT (Pseudomorphic High-Electron-Mobility Transistor) devices. The operation of these transistors is based upon the strength of an electrical field in a “channel” underneath a “gate” region. In the ideal case, inaccuracies in the current multiplication factor should relate back only to lithographic errors, which are unavoidable in semiconductor device manufacturing. However, the lithographic errors can be minimized.
If the electrical device transfer functions are ideal, in the sense that differences in the electrical environment or temperature of the reference device and the biased device do not influence the current multiplication factor, then the geometrical errors of the devices define the accuracy limit that can be achieved. However, this is not generally the case, particularly in advanced transistor devices with very short channel lengths; the channel length being the physical length of the gate contact. Various operational parameters influence the current multiplication factor in traditional current mirror devices.
For instance, short channel effects, which result from channel length modulation due to changes in the transistor's drain-source voltage, effect the current multiplication ratio. Velocity saturation effects, which depend on the transistor's drain-source voltage and result from the limited drift velocity of charge carriers in the channel region of the transistor substrate, also effect the current multiplication ratio. Threshold voltage modulation effects also influence the current multiplication ratio. The threshold voltage modulation effects generally result from either a barrier lowering effect caused by increasing drain-source voltage in short channel length transistors, or a barrier increasing effect, particular to short channel length silicon MOSFET transistors, caused by increasing source-bulk voltage. Still further, drain-gate reverse leakage current, common to FETs, has an effect on the current multiplication ratio. The drain-gate leakage current typically results from reverse leakage, including tunnelling, in the gate-source Schottky contact in MESFET devices, or tunnelling through the gate oxide region in MOSFET devices.
The present invention is directed toward overcoming one or more of the above-mentioned problems.
SUMMARY OF THE INVENTION
A current mirror circuit is disclosed including a reference device and a biased device, each having control, input and output elements, with the control element of the biased device operably connected to the control element of the reference device. A reference current source is connected to the input element of the reference device and produces a reference current flowing through the reference device, wherein a bias current is produced in the biased device as a multiple of the reference current. A compensation network is connected between the biased device and the reference device for maintaining a constant bias current in the biased device regardless of varying operating characteristics in at least one of the biased device and the reference device.
In one form, the reference and biased devices include field effect transistors having gate, drain and source elements corresponding to the control, input and output elements.
In another form, the reference and biased currents flow from the drain to source elements in the reference and biased transistors, respectively. The varying operating characteristics include a varying voltage across the drain and source elements of at least one of the biased transistor and the reference transistor.
The varying voltage across the drain and source elements of at least one of the biased transistor and the reference transistor results from at least one of threshold voltage modulation, short channel effects and gate leakage current occurring in at least one of the biased transistor and the reference transistor.
In another form, the compensation network includes a first resistor connected between the input element of the reference device and the control element of the biased device, and a second resistor connected between the input element of the biased device and the control element of the reference device.
The current mirror circuit may further include third and fourth resistors serially connected between the control elements of the reference device and the biased device. A feedback loop is provided between a node common to the third and fourth resistors and the input element of the reference device. Depending upon the types of transistors implemented in the current mirror circuit, the feedback loop may include a unity gain amplifier or a level shifter biasing the reference device to operate in a saturation mode. The first and second resistors may have equal resistance values, and the third and fourth resistors may have equal resistance values.
In another form, the compensation network further includes a compensation device having control, input and output elements, with the input element of the compensation device connected to the input element of the biased device, and the control element of the compensation device connected to the control element of the reference device. A fifth resistor is connected between the output element of the compensation device and ground.
The compensation device may include a field effect transistor having gate, drain and source elements corresponding to the control, input and output elements.
In another form, the compensation network further includes a sixth resistor connecting the second and third resistors to the control element of the reference device, and a seventh resistor connecting the first and fourth resistors to the control element of the biased device.
An object of the present invention is to cancel the effects of threshold voltage modulation in a current mirror device.
A further object of the present invention is to cancel the influence of short channel effects in a current mirror device.
A further object of the present invention is to cancel the influence of gate leakage current related effects in a current mirror device.
A further object of the present invention is to maintain a constant output current in a current mirror device regardless of voltage changes in either the reference or biased device.
Other aspects, objects and advantages of the present invention can be obtained from a study of the application, the drawings, and the appended claims.


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Toumazou, C. et al.: “High Frequency Gallium Arsenide Current Mirror”,Electronics Letters, vol. 26, No. 21, Oct. 11, 1990, pp. 1802-1804.
Pflueger, R. J.: “New RTD-Bootstrapped Current and Voltage. References II. Mirror-based References”, IEEE Transactions on Circuits and Systems I: Fundamental Theory and

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