Current bias voltage sense single ended preamplifier

Details Current bias voltage sense single ended preamplifier Current bias voltage sense single ended preamplifier

2000-10-27

2002-06-11

Faber, Alan T. (Department: 2651)

Dynamic magnetic information storage or retrieval

General recording or reproducing

Specifics of biasing or erasing

C360S067000

Reexamination Certificate

active

06404579

ABSTRACT:

FIELD OF THE INVENTION
The invention relates generally to the field of information storage, more specifically to hard disk drives and in particular to preamplifier circuits.
BACKGROUND OF THE INVENTION
U.S. Pat. No. 5,831,888 entitled “Automatic Gain Control Circuit” and assigned to Texas Instruments Incorporated, the assignee of the present invention, sets forth generally the description of disk storage. Hard disk drives (HDD) are one type of disk storage that are particularly used in personal computers today. The HDD device generally includes a magnetic storage media, such as rotating disks or platters, a spindle motor, read/write heads, an actuator, a preamplifier, a read channel, a write channel, a servocontroller, a memory and control circuitry to control the operation of the HDD and to properly interface the HDD to a host or system bus. The following U.S. Patents describe various aspects of HDD devices:
5,535,067
Frequency Controlled Reference Generator
Issued 07/09/96
5,570,241
Single Channel, Multiple Head Servo . . .
10/29/96
5,862,005
Synchronous Detection Of Wide
01/19/99
BI-Phase . . .
5,793,559
In Drive Correction Of Servo Pattern . . .
08/11/98
5,719,719
Magnetic Disk Drive With Sensing . . .
02/17/98
5,444,583
Disk Drive Having On-Board Triggered . . .
08/22/95
5,448,433
Disk Drive Information Storage Device . . .
09/05/95
5,208,556
Phase Lock Loop For Sector Servo System
05/04/93
5,642,244
Method and Apparatus For Switching . . .
06/24/97
Prior art
FIG. 1
illustrates a disk/head assembly
12
and a preamplifier
14
. The preamplifier
14
handles both read functions and write functions. Not illustrated in FIG.
1
, for clarity, is the Magentoresistive (MR) head. The unshown MR head works through magnetic media and it has both functions, read and write, with a different portion of the head performing each function. The write function portion of the MR head is inductive and the read function portion of the head acts as a magnetic resistive element. A write occurs through an inductive element to the magnetic media disk assembly
12
and a read occurs by sensing the magnetic shifts in the disk assembly
12
by using the resistive read element. The preamplifier
14
connects to the unshown MR head.
The preamplifier
14
typically is a multistage preamplifier having an initial amplification stage, a middle amplification stage and a final amplification stage. The initial amplification stage is usually of the single ended variety as opposed to the middle amplification stage which is usually of the differential variety. The single ended variety is particularly advantageous in hard disk drive applications as one input to the preamplifier is the MR head input and the other input is ground. Effectively, therefore, it has only one input, the MR head input, and so it is referred to as single ended. Two types of single ended initial amplification stages exists: current bias current sense design systems; and, voltage sense design systems.
FIG. 2
illustrates a prior art current bias current sense preamplifier such as suitable for preamplifier
14
of prior art FIG.
1
. Current bias means that the preamplifier sends a constant current through the MR head. Current sense means that when the MR head moves over data stored on the disk/head assembly
12
, the input signal to the MR head is a current signal. The input signal is thus indicative of a current change in the head. (In a voltage sense preamplifier, the input signal is a voltage signal as opposed to a current signal.) In
FIG. 2
, Rhead is a resistor that represents is the MR head. Lhead is a wire that goes from the preamplifier to the MR head and is represented as an inductor. The triangular figure represents the preamplifier. One input to the preamplifier is the MR head input and the other input to the preamplifier is ground. Since it is a current sense preamplifier, by definition it has a very low input impedance (which in this case, is about 5 ohms).
Prior art
FIG. 3
illustrates a portion of the read channel of the current bias current sense preamplifier
14
of FIG.
2
. The resistive portion of the MR head is represented by the resistor Rmr. Rmr
0
represents head
0
and Rmr
1
represents head
1
. In typical mass storage devices of the HDD type, the preamplifier
14
may have as many as 1 to 8 channels. An initial amplification stage
18
of preamplifier
14
connects to the resistive portion Rmr of the MR head. Later gain stages
20
of preamplifier
14
are connected to the outputs of initial amplification stage
18
at nodes P and Q. The read path outputs flow from the later gain stages
20
. Amplifier Rma is the read channel middle amplifier and amplifier Roa is the read channel output amplifier. Both amplifiers are of the differential type. The head selection is performed on preamplifier
14
from an unillustrated head select logic stage. Transistor M
2
represents the read channel input enabling MOS transistor for head
0
.
In
FIG. 3
, the architecture of initial amplification stage
18
of preamplifier
14
is constructed as that of a single ended amplifier as opposed to a differential amplifier. On the RL load side of the single ended amplifier, the bias current Ib travels through the load resistor RL and through the collector of transistor Q
1
to set the voltage on node M. On the constant voltage side of the single ended amplifier, the bias current Ib/k (k is a scaling constant) travels through the scaling reference resistor Ref to set the voltage on node N. In hard disk drives, during a read operation, the current in the read head (represented by Imr) is biased up to a certain level, which is typically around 2—8 mA. This bias current Imr is established through a feedback loop created by transconductance amplifier
22
across nodes M and N whose output is connected to the base of the input transistor Q
0
through MOS switch M
2
. This, in essence, creates a pseudo-balanced output on the reader load resistors such as would exist if a differential amplifier were used in the initial amplification stage
18
as dc nodes M & N will be at the same potential. Since the head resistance Rmr
0
is connected to transistor Q
0
, the impedance looking from Rmr into transistor Q
0
is very small because it is looking into the emitter of the bipolar transistor Q
0
. (Emitter impedance is low for bipolar transistors - - - only a few ohms.) A problem, however, with low impedance is bandwidth rolloff as will be explained later below.
In operation of prior art
FIG. 3
, when head
0
is selected by unillustrated head select logic circuitry (which establishes a current Imr on the gate of MOS transistor M
2
) NPN bipolar transistors Q
0
and Q
1
are on. Together with the load resistor RL, they form a cascode amplifier. A cascode amplifier is a high bandwidth amplifier. The transistor Q
0
is a common base amplifier and the transistor Q
1
acts as a common base amplifier. As the magnetic resistive head moves over data, the head resistance Rmr varies. This can be modeled by an alternating current ac signal in series with the Rmr resistor. The transistors Q
0
and Q
1
amplify this signal. The ac signal goes to the load resistor RL and produces an ac signal at node M which is the input of latter gain stage
20
that is a differential amplifier. The other input of the amplifier
20
is node N that should be at a dc bias voltage equal to the voltage on the load resistor RL node M. The node N, which is the constant voltage side of the later gain stage amplifier
20
, should not have an alternating current signal on it. The transconductance amplifier
22
and the capacitor C
1
form a feedback loop with the cascode amplifier Q
0
and Q
1
. The purpose of the loop is to make sure that node M dc voltage on the signal side of the load resistor RL is the same as the dc voltage on node N. If the dc voltage on node M and node N are the same, the input voltages on differential amplifier
20
are the same. On node N, there is no ac signal; on node M there is an ac signal. If the dc voltages are equal, then the differential later gai

Affiliated with

Also associated with

Rating

Current bias voltage sense single ended preamplifier does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Current bias voltage sense single ended preamplifier, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Current bias voltage sense single ended preamplifier will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2961742