Crystal oscillator with peak detector amplitude control

Oscillators – Solid state active element oscillator – Transistors

Reexamination Certificate

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Details

C331S109000, C331S158000, C331S160000, C331S183000, C331S186000

Reexamination Certificate

active

06278338

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to crystal oscillators and more particularly to crystal oscillators having peak detector amplitude control to accommodate a wide dynamic range of frequencies and a wide range of crystal specifications.
2. Description of Related Art
Oscillators, clocks and timers are essential to the performance of most modem electronic devices. Examples of devices that use oscillators, clocks and timers are commonplace. Digital timepieces (e.g., digital wristwatches), computers, videocassette recorders, televisions, cordless telephones and wireless communication devices (e.g., cellular phones, pagers and Internet-enabled personal digital assistants (PDAs)) all use timers to generate internal clock signals used by the devices. As is well known, timers and clocks typically use crystal oscillators to derive desired clockrate signal for use by electronic devices. Crystal oscillators are also utilized in electronic communication and navigation systems to establish transmitting and receiving operating frequencies.
A typical basic oscillator circuit is shown in
FIG. 1
in block diagram form. Basic oscillators sustain oscillation signals using a closed-loop feedback system that is now described. The basic oscillator is designed to produce a continuous sine wave signal (i.e., oscillating signal) having an associated signal frequency. The associated signal frequency is determined by certain properties of the feedback network shown in FIG.
1
. As shown in
FIG. 1
, the basic oscillator typically comprises an inverting amplifier
2
and a feedback network
4
. The inverting amplifier
2
receives an input from a bias source (not shown). The inverting amplifier
2
outputs an amplified and inverted signal to an input of the feedback network
4
and to an output. The feedback network
4
outputs a feedback signal to the input of the inverting amplifier
2
and thus completes the closed-loop feedback system. An oscillator must meet certain criteria to operate properly.
Typically, a basic oscillator circuit must meet two design criteria to function properly. First, the oscillator's total loop gain (“T”) must be equal to 1. Second, the oscillator's total phase shift must be equal to 0. The total loop gain T is the amplifier gain (“a”) multiplied by the feedback gain (“f”). The value of the feedback gain is less than one. The amplifier gain (“a”) represents the ratio of the output voltage versus the input voltage of the inverting amplifier
2
shown in FIG.
1
. The total phase shift is the phase of the inverting amplifier
2
and the phase of the feedback network
4
. The total phase shift can be represented mathematically as: arg(af)=0, where arg(af) is the phase angle of (af) in radians.
After initialization, an oscillator signal's amplitude grows steadily until reaching steady state. Steady state is achieved through a mechanism that limits the loop gain. Two mechanisms for limiting loop gain are “gain-limiting” in the amplifier element (in the form of non-linearities intrinsic to the device or clipping) or regulating gain in the circuit (in the form of amplitude regulation or AGC control methods). If loop gain is not limited, the amplitude grows infinitely. Under real world conditions, the initial loop gain must be greater than 1 to insure reliable oscillation operation. Typically, most oscillators have an initial loop gain value between 2 and 3. At steady state the amplitude of the oscillation amplitude reaches equilibrium (i.e., neither increases nor decreases) because the loop gain has reached equilibrium. Upon reaching steady state (i.e., stable oscillation), the total loop gain can be represented mathematically as: |af|=1.
As is well known in the electronics art, crystal oscillators utilize crystals to generate an oscillating signal. One type of crystal oscillator circuit that is well-known to those skilled in the oscillator design art is a “Pierce oscillator”. A simplified schematic diagram of a Pierce oscillator is shown in
FIG. 2
a
. A Pierce oscillator typically comprises an inverting amplifier
2
, a crystal
6
, a first capacitor
16
and a second capacitor
18
. As shown in
FIG. 2
a
, the inverting amplifier
2
and the crystal
6
are coupled in a shunt configuration having two nodes. The capacitors
16
,
18
each have two nodes. One node of the capacitor
16
is coupled to a first node of the shunt configuration. The other node of the capacitor
16
is coupled to a common ground
90
. Similarly, one node of the capacitor
18
is coupled to a second node of the shunt configuration. The other node of the capacitor
18
is coupled to the common ground
90
. As before, the inverting amplifier
2
has an amplifier gain “a”. The crystal
6
and capacitors
16
and
18
are analogous to the feedback network
4
of FIG.
1
. The crystal loss can best be described by modeling the crystal
6
using an electrical equivalent.
The crystal
6
can be modeled by an electrical equivalent comprising an inductor, a capacitor, a resistor and a shunt capacitor. The Pierce oscillator of
FIG. 2
a
is now described using a crystal model of the crystal
6
.
FIG. 2
b
is a simple schematic diagram of an electrical equivalent of the Pierce oscillator of
FIG. 2
a
. The electrical comprises an inverting amplifier
2
, a crystal model
6
′, a capacitor
16
and a capacitor
18
. The Pierce oscillator representation of
FIGS. 2
a
and
2
b
are substantially similar and thus common components are not described in detail herein. As shown in
FIG. 2
b
, the crystal model
6
′ comprises an inductor
8
, a capacitor
10
, a resistor
12
and a capacitor
14
. The inductor
8
, capacitor
10
and resistor
12
are coupled in series as shown. The capacitor
14
is coupled to the series network in a shunt configuration.
In the crystal oscillator of
FIG. 2
b
, the resistor
12
represents the Equivalent Series Resistance (ESR) of the crystal
6
of
FIG. 2
a
. The loss of the crystal is represented by the ESR. As described above with reference to
FIG. 1
, a crystal oscillator must meet two criteria to function properly. First, the total loop gain (“T”) of the oscillator must equal 1. The total loop gain T is the amplifier gain (“a”) multiplied by the by the feedback circuit formed by crystal
6
and capacitors
16
,
18
. The total loop gain, T, can be represented mathematically as: |af|=1. Second, the total phase shift of the oscillator must equal 0. In the Pierce oscillator of
FIGS. 2
a
and
2
b
, the total phase shift is the phase of the inverting amplifier
2
, taken together with the phase of the crystal
6
(or
6
′ of
FIG. 2
b
). In the Pierce oscillator the arg(a)=−180 and the arg(f)=−180. Thus, the total phase shift can be represented mathematically as: arg(af)=0, where arg(af) is the phase angle of (af) in radians.
The Pierce oscillator of
FIGS. 2
a
and
2
b
initially operates by first applying a bias such that the total loop gain, T, (i.e., af) is greater than 1. As the amplitude of the output of the inverting amplifier
2
increases, the gain of the amplifier, “a” is reduced by limiting non-linearities within the inverting amplifier
2
until a steady-state of T=af=1 occurs. Two disadvantages are associated with the technique of limiting non-linearities in the amplifier.
One disadvantage is the introduction of unwanted side effects such as the clipping of signals, distortion and harmonics (harmonics lead to unwanted signal radiation that interferes with other signals). A second disadvantage of limiting non-linearities in the inverting amplifier is a waste of total loop gain. The total loop gain is wasted because a large amount of current must be supplied to the oscillator to ensure that the initial loop gain is greater than 1 for initialization, while the non-linearities limit the oscillation signal by distorting the amplifier. The non-linearities reduce the initial loop gain from a value greater tha

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