Crosspoint switch with independent schedulers

Details Crosspoint switch with independent schedulers Crosspoint switch with independent schedulers

1999-04-20

2004-06-08

Vanderpuye, Kenneth (Department: 2732)

Multiplex communications

Pathfinding or routing

Through a circuit switch

C370S395100

Reexamination Certificate

active

06747971

ABSTRACT:

FIELD OF INVENTION
The field of the invention relates to networking in general and switching system architecture more specifically.
BACKGROUND OF THE INVENTION
Networking switches are used to quickly transport traffic across different connections at a network node.
FIG. 1
shows an architectural perspective of a typical networking switch. Incoming traffic (from inbound physical lines
102
a-x
) enters the switch at various adapter cards
103
a-y
and is subsequently processed by ingress ports
104
a-z
. The traffic is then directed from the ingress ports
104
a-z
to the switching fabric
105
. The switching fabric
105
then directs the traffic to the appropriate egress ports
106
a-z
from whence its ultimately sent to adapter cards
103
a-y
and outbound physical lines
107
a-x
. A single adapter card typically has both inbound and outbound physical lines
102
,
107
thus the same adapter card (e.g., adapter card
103
a
) is shown in
FIG. 1
on the ingress and egress sides of the switching fabric
105
.
There are typically six basic levels of a switch: inbound physical lines
102
, adapter cards
103
, ingress ports
104
, the switch fabric
105
, egress ports
106
, and outbound physical lines
107
. Ingress ports send network traffic to the switching fabric while egress ports are logic levels that collect network traffic from the switching fabric. Sometimes the ports are located on the adapter cards while in other instances the ports are located on separate logic cards that logically fit between the adapter cards and the switch core.
It is important to note that the number of physical lines (x) does not necessarily equal the number of adapter cards (y) or the number of ingress/egress ports (z). For example, one adapter card may support more than one physical line (e.g., adapter card
103
a
may support physical lines
102
a-c
and
107
a-c
). Furthermore, the number of adapter cards (y) does not necessarily equal the number of ports (z). For example, port
104
a
may aggregate traffic from adapter cards
103
a-b
. Thus, the switch architecture may aggregate traffic flow at different levels within the switch.
Regardless of the switch design, however, usually all switch architectures may be reduced to the generic design
200
shown in FIG.
2
.
FIG. 2
shows ingress ports
204
a-n
with incoming traffic
201
a-n
, egress ports
206
a-n
with outgoing traffic
208
a-n
and switching fabric
205
. Depending on the degree of lower level aggregation, incoming traffic
201
a-n
may be traffic from a single physical line, multiple physical lines, a single adapter card or multiple adapter cards.
The switch fabric
205
is may be broken down into smaller switching planes
209
a-h
. Each ingress and egress port
204
a-n
,
206
a-n
has one switch channel (e.g.,
210
a
-
210
h
) to each switching plane
209
a-h
such that any switching plane
209
a-h
may accept network traffic from any ingress port
204
a-n
and direct it to any egress port
206
a-n
. The bandwidth of the switch is proportional to the total number of switch planes
209
within the switch fabric
205
. Central to the overall performance of the switch is a scheduler (not shown) which grants permission to each ingress port
204
to send network traffic to the switch fabric
205
.
Some prior art designs only have one scheduler per switch fabric
205
. Unfortunately, a single scheduler can only schedule a single set of paths from the ingress ports
204
to the egress ports
206
. As a result different packets or cells; cannot simultaneously use the multiple switch planes
209
a-h
which forces the switch planes
209
a-h
to switch multiple parts of the same cell. This reduces reliability and prevents scaleable operation.
SUMMARY OF THE INVENTION
An apparatus is described comprising an ingress port, a plurality of switch planes having a dedicated scheduler, each of the switch planes communicatively coupled to the ingress port. Also, a method is described comprising queuing traffic at an ingress port, requesting switch plane service for the traffic across a plurality of switch planes, and scheduling the traffic independently at each of the switch planes.


REFERENCES:
patent: 5130984 (1992-07-01), Cisneros
patent: 5157654 (1992-10-01), Cisneros
patent: 5274631 (1993-12-01), Bhardwaj
patent: 5367520 (1994-11-01), Cordell
patent: 5577035 (1996-11-01), Hayter et al.
patent: 5717871 (1998-02-01), Hsieh et al.
patent: 5768257 (1998-06-01), Khacherian et al.
patent: 5790545 (1998-08-01), Holt et al.
patent: 5832303 (1998-11-01), Murase et al.
patent: 5896380 (1999-04-01), Brown et al.
patent: 5898687 (1999-04-01), Harriman et al.
patent: 6044061 (2000-03-01), Aybay et al.
patent: 6069893 (2000-05-01), Parruck et al.
patent: 6072772 (2000-06-01), Charny et al.
patent: 6147969 (2000-11-01), Benmohamed et al.
patent: 6185188 (2001-02-01), Hasegawa
patent: 6343066 (2002-01-01), Magill et al.
patent: 6515991 (2003-02-01), McKeown
patent: 6577635 (2003-06-01), Narayana et al.
patent: 6633568 (2003-10-01), Han et al.
patent: 6661788 (2003-12-01), Angle et al.
patent: WO98/44686 (1998-10-01), None
patent: WO 98/44686 (1998-10-01), None
PCT Search Report, PCT/US 00/10675.
Nick McKeown, The iSLIPScheduling Algorithm for Input-Queued Switches, IEEE/ACM Transactions on Networking, Vol 7, No. 2, Apr. 1999.
Arturo Cisneros, Large Packet Switch and Contention Resolution Device; International Switching Sumposium 1990, Stockholm Sweden May 28-Jun. 1, 1990.
Joan Garcia-Haro and Andrzej Jajszczyk, “ATM Shared-Memory Switching Architecture” IEEE Network, vol. 8 No. 3, Jul./Aug. 1994, pp. 18-26.
Michael G. Hluchyj and Mark J. Karol, “Queing in High-Performance Packet Switching,” IEEE Journal on Selected Areas in Communications, vol. 6, No. 9. Dec. 1988. pp. 1587-1597.
Soung C. Liew and Kevin W. Lu, “Comparison of Buffering Strategies for Asymmetric Packet Switch Modules,” IEEE Journal on Selected Areas in Communications, vol. 9, No. 3, Apr. 1991, pp. 428-438.
Kai Y. Eng, Mark J. Karol, and Yu-Shuan Yeh, “A Growable Packet (ATM) Switch Architecture: Design Principles and Applications,” IEEE Transactions on Communications, vol. 40, No. 3, Feb. 1992, pp. 423-430.
Mark J. Karol and Chih-Lin I, “Performance Analysis of a Growable Architecture for Broad-Band Packet (ATM) Switching,” IEEE Transactions on Communications, vol. 40, No. 3, Feb. 1992, pp. 431-439.
Patent Cooperation Treaty's Written Opinion for International application No. PCT/US00/10675, dated Mar. 27, 2001, 6 pgs.
Nick McKeown, “The iSLIP Scheduling Algorithm For Input-Queued Switches”, IEEE/ACM Transactions On Networking, vol. 7, No. 2, Apr. 1999, pp. 188-201.
Arturo Cisneros, “Large Packet Switch and Contention Resolution Device”, International Switching Symposium (ISS), Poster Session, Paper #14, May/Jun. 1990, Proceedings, vol. III, pp 77-83.
Joan Garcia-Haro and Andrzej Jajszczyk, “ATM Shared-Memory Switching Architectures”, IEEE Network, May/Jun. 1994, vol. 8, No. 3, pp 18-26.
Michael G. Hluchyj and Mark J. Karol, “Queueing in High-Performance Packet Switching”, IEEE Journal On Selected Areas In Communications, vol. 6, No. 9, Dec. 1988, pp. 1587-1597.
Soung C. Liew, and Kevin W. Lu, “Comparison of Buffering Strategies For Asymmetric Packet Switch Modules”, IEEE Journal On Selected Areas In Communication, vol. 9, No. 3, Apr. 1991, pp. 428-438.
Kai Y. Eng and Mark J. Karol and Yu-Shuan Yeh, “A Growable Packet (ATM) Architecture: Design Principles and Applications”, IEEE Transactions On Communications, vol. 40, No. 2, Feb. 1992, pp. 423-430.
Mark J. Karol and Chih-Lin I, “ Performance Analysis Of A Growable Architecture For Broad-Band Packet (ATM) Switching”, IEEE Transactions On Communications, vol. 40, No. 2, Feb. 1992, pp. 431-439.

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