Crossbar switch for multi-processor, multi-memory system for res

Details Crossbar switch for multi-processor, multi-memory system for res Crossbar switch for multi-processor, multi-memory system for res

1994-05-04

1996-09-24

Harvey, Jack B.

395475, 395477, G06F 1300

Patent

active

055599702

ABSTRACT:
A self-routing crossbar switch interconnects a plurality of processors with a plurality of memory modules. In a self-routing crossbar switch connecting N processors and N memory modules, a processor is connected to each input port and a memory module is connected to each output port; each of the N processors can transmit a memory request simultaneously provided that there is no port contention and no bank contention. Port contention occurs if two or more processors attempt to access the same output port of the self-routing crossbar switch at the same time. The memory module consists of several memory banks that are connected in an interleaved manner. If the memory bank is accessed before it is ready to accept a new request, bank contention is said to have occurred. In the self-routing crossbar switch the requests directed to a port are first passed through an aligner and a conflict resolution logic. There is one aligner associated with each output port. The aligner inputs the requests directed at an output port and aligns them so that, at the output of the aligner, all the active requests appear in a consecutive fashion. The conflict resolution logic resolves the port and bank contention.

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Karol et al., "Input Versus Output Queueing on a Space-Division Packet Switch", IEEE Transactions on Communications, vol. COM-35, No. 12, pp. 1347-1356 (Dec. 1987).

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