Crossbar-array designs and wire addressing methods that...

Etching a substrate: processes – Forming or treating electrical conductor article

Reexamination Certificate

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C216S017000, C216S018000, C257S758000

Reexamination Certificate

active

07922919

ABSTRACT:
Various embodiments of the present invention are directed to crossbar array designs that interfaces wires to address wires, despite misalignments between electrical components and wires. In one embodiment, a nanoscale device may be composed of a first layer of two or more wires and a second layer of two or more address wires that overlays the first layer. The nanoscale device may also include an intermediate layer positioned between the first layer and the second layer. Two or more redundant electrical component patterns may be fabricated within the intermediate layer so that one or more of the electrical component patterns is aligned with the first and second layers.

REFERENCES:
patent: 6256767 (2001-07-01), Kuekes
patent: 6573613 (2003-06-01), Arimoto
patent: 6756645 (2004-06-01), Shau
patent: 6861682 (2005-03-01), Bang
patent: 2001/0033030 (2001-10-01), Leedy
patent: 2004/0151012 (2004-08-01), Snider
patent: 2005-004203 (2005-01-01), None
Hewlett-Packard Development Company, L.P., KR 2008-7013211 (co-pending application), English Translation of Dec. 1, 2009 Notice of Preliminary Rejection issued by KIPO.
Rachlin E et al: “Analysis of a Mask-Based Nanowire Decoder” VLSI, 2005. Proceedings. IEEE Computer Society Annual Symposium on Tampa, FL, USA May 11-12, 2005, Piscataway, NJ, USA,IEEE, May 11, 2005, pp. 6-13, XPOI0798461 ISBN: 0-7695-2365-X—p. 2, right-hand column; figures 2,3.
Beckman Robert et al: “Materials science—Bridging dimensions: Demultiplexing ultrahigh-density nanowire circuits” Science; Science Oct. 21, 2005, vol. 310, No. 5747, pp. 465-468, XP002430694 p. 467, left-hand column; figure 3B.
Dmitri B Strukov et al: “Prospects for terabit-scale nanoelectronic memories” Nanotechnology, IOP, Bristol, GB, vol. 16, No. 1, Jan. 1, 2005, pp. 137-148, XP020090723 ISSN: 0957-4484 p. 138, left-hand column, paragraph 3—p. 140, right-hand column, paragraph 2; figure 2.
HPDC, “Crossbar-array Designs And Wire Addressing Methods That Tolerate Misalignment Of Electrical Components With Wires At Wire Overlap Points”, PCT/US2006/042923, Jun. 1, 2007.

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