Cross-talk reduction in semiconductor memory device

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307221C, 307224R, 307237, 307208, 328 37, 328 37, 328163, 328166, G11C 1900, H03B 100, H03K 500

Patent

active

039834107

ABSTRACT:
The memory circuit comprises a semiconductor shift register and means for effecting two phase clocking of the digital information through the shift register. Transformer means are provided for inducing a controlled amount of cross-talk in each of the two phases in the opposite sense to cross-talk generated by capacitive components present in the shift register whereby the induced cross-talk substantially cancels out the capacitive generated cross-talk.

REFERENCES:
patent: 3140405 (1964-07-01), Kolling
patent: 3290653 (1966-12-01), Slattery et al.
patent: 3329835 (1967-07-01), D'Agostino
patent: 3714460 (1973-01-01), Clemetson et al.

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