Cross coupled semiconductor memory cell

Details Cross coupled semiconductor memory cell Cross coupled semiconductor memory cell

1974-05-10

1976-04-27

James, Andrew J.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

357 15, 357 46, 357 48, 307238, 307288, H01L 2702, H01L 2704, H03K 500, H03K 326

Patent

active

039538664

ABSTRACT:
A semiconductor memory cell, and a method for fabrication, including a one conductivity semiconductor body having a major surface and an opposite conductivity layer formed on said major surface said layer having a planar surface. Means extend from said planar surface through said layer to contact said body for isolating portions of said layer into first and second device regions. First and second device regions each include a one conductivity region formed in said device region extending to said planar surface, an opposite conductivity region formed within said one conductivity regions extending to said surface, and a metal-to-semiconductor contact carried by said device region at said planar surface. Lead means include means for ohmic interconnection of opposite conductivity regions formed in said first and second device regions, means for interconnecting said first device region and said one conductivity region formed in said second device region. Lead means further includes means for interconnection of said second device region and said one conductivity region formed in said first device region. Additional lead means is provided for coupling said metal-to-semiconductor contacts, said semiconductor body and said interconnected opposite conductivity regions with external circuitry.

REFERENCES:
patent: 3643235 (1972-02-01), Berger et al.
patent: 3761898 (1973-09-01), Pa.

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