Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
2002-07-26
2004-09-28
Whitmore, Stacy A. (Department: 2812)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C703S022000, C716S030000, C716S030000, C700S109000
Reexamination Certificate
active
06799152
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to methods for analyzing process variations that occur during an integrated circuit fabrication process. More specifically the invention relates to statistical process control methods for identifying and correcting critical dimension variation of an integrated circuit fabrication process.
BACKGROUND OF THE INVENTION
Statistical process control is the application of statistical methods to the measurement and analysis of variations in a process. A process can be defined as the organization of individuals, machines, materials and methods that produces a specified product. Statistical process control can provide information on whether variations in a process product are within the specification limits of the process. Thus, statistical process control provides information about process quality and may explain the cause(s) of poor process performance.
Statistical process control analysis is a useful tool in integrated circuit fabrication, where rigorous control of process quality is necessary. Statistical process control has become critical to the success of integrated circuit fabrication processes as device sizes reach 0.35 &mgr;m or less. Process engineers routinely use real time statistical process control to monitor key parameters that affect integrated circuit fabrication process quality.
Controlling variation in critical dimension of integrated circuit features during integrated circuit fabrication processes is critical in the competitive integrated circuit industry. Particularly important is determining whether variation in critical dimension of an integrated circuit fabrication process is caused by machine variation or process variation.
Statistical process control trend charts have been used to analyze the cause of critical dimension variation during integrated circuit fabrication. Comparing the trend charts of different processes and machines used in the integrated circuit fabrication process provides useful information about process quality, but requires significant time and effort to identify and characterize critical dimension variation. Statistical process control chart analysis requires constant collection and analysis of large amounts of experimental data. Thus, statistical process control chart analysis is labor intensive, which wastes skilled engineering resources that could be more efficiently deployed in solving fundamental process problems.
Therefore, there is a continuing need for improved statistical process control methodologies that rapidly and efficiently identify causes of critical dimension variation in an integrated circuit fabrication process. Furthermore, such methods preferably have a relatively high degree of automation to conserve expensive engineering resources.
SUMMARY OF THE INVENTION
The present invention relates generally to statistical process control methods that may efficiently identify the likely cause of critical dimension variation during integrated circuit fabrication. The described methods are easily implemented and allow for rapid identification of the likely cause of critical dimension variation, thus increasing the efficiency while reducing the cost of integrated circuit fabrication.
In one aspect, the current invention provides a method for analyzing process variations that occur during integrated circuit fabrication. Critical dimension data is collected for each layer of an integrated circuit fabrication process for a period of time. A shift indicator that indicates variation in the critical dimension data for each layer of the integrated circuit fabrication process is calculated using the collected critical dimension data. A machine drift significance indicator is also calculated for each machine used in each layer of the integrated circuit fabrication process and a maximum shift of mean value for each layer of the integrated circuit fabrication process is defined. The shift indicator, the maximum shift of mean value and the machine drift significance indicator are used to determine at least one likely cause of variations in critical dimensions for each layer of the integrated circuit fabrication process.
In one embodiment, the maximum shift of mean value is a function of a defined acceptable value of the shift indicator. In a more specific embodiment, the maximum shift of mean value is defined by the following formula: maximum shift of mean value=½ specification of the process−(target Cpk*3 standard deviation). In one embodiment, the shift indicator is Cpk. In a more specific embodiment, Cpk is defined by the following formula: Cpk=(½ specification of the process—mean value shift)/3 standard deviation. In one embodiment, the machine drift significance indicator is P
0
. In a more specific embodiment, P
0
is defined by the following formula:
P
0
=
Probability
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1
2
=
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j
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1
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q
j
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In another aspect, the present invention provides a method for analyzing process variations that occur during integrated circuit fabrication. Critical dimension data for each layer of the integrated circuit fabrication process is collected for a period of time. If a calculated shift indicator is less than a predetermined first threshold value, likely causes of critical dimension variations are identified at least in part based on the machine drift significance indicator for particular machines. The machine drift significance indicator are calculated for each machine used in each layer of the integrated circuit fabrication process.
In some embodiments, when the machine drift significance indicator is greater than a predetermined threshold value, the likely cause of critical dimension variations is further based at least in part on the maximum shift in mean values.
REFERENCES:
patent: 5956251 (1999-09-01), Atkinson et al.
patent: 6721676 (2004-04-01), Ueda
Randles et al., “Introduction to The Theory of Nonparametric Statistics”, (Date/Publisher unknown) pp. 395-397.
Chen Chih-Ping
Hsu Shao-Chung
Lin Cheng-Yi
Liu De-Chuan
Liu Hsin-Cheng
Beyer Weaver & Thomas LLP
Macronix International Co. Ltd.
Whitmore Stacy A.
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