Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Timing
Reexamination Certificate
2011-04-26
2011-04-26
Frejd, Russell (Department: 2128)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Timing
C703S002000, C703S014000, C716S030000
Reexamination Certificate
active
07933761
ABSTRACT:
Methods for generating simulation vectors incorporating periodic jitter, or phase-shifted periodic jitter are disclosed. Periodic jitter, such as sinusoidal jitter, is preferably represented by a mathematical equation which defines the amount of jitter experienced at each cycle of a clock or data signal. The calculated periodic jitter for each cycle is used to form a new multi-cycle vector incorporating the jitter. If a particular signal to be simulated additionally needs to travel a particular distance such that it would experience a time delay, that time delay may also be incorporated into the jitter equation as a phase shift. So incorporating the time delay into the jitter equation allows for the easy simulation of circuits receiving the vectors without the need to actually design or “lay out” the circuits that imposing the time delay. This technique is particularly useful in efficient modeling, or optimization of, the clock distribution network and sample circuits used to receive data in a SDRAM integrated circuit.
REFERENCES:
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Frejd Russell
Micro)n Technology, Inc.
Wong Cabello Lutsch Rutherford & Brucculeri LLP
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