CPU with integrated multiply/accumulate unit

Details CPU with integrated multiply/accumulate unit CPU with integrated multiply/accumulate unit

1992-11-10

1994-05-10

Nguyen, Long T.

Boots, shoes, and leggings

3647505, G06F 738

Patent

active

053114582

ABSTRACT:
An integrated circuit (IC) processor architecture is disclosed that implements hardware, signal processing (DSP) functions with less digital improved speed and a more efficient layout. The resources of the central processing unit (CPU) are used in conjunction with an integrated multiply/accumulate unit to perform DSP operations. Internal registers of the CPU are used to store pointers which reference a circular sample buffer. The CPU thus manages the selection and transfer of coefficients from the sample buffer to the multiply/accumulate unit, thereby allowing a minimum amount of lower speed hardware to be used for the multiply/accumulate unit and permitting DSP operations to be performed in parallel with CPU operations.

REFERENCES:
patent: 4597053 (1986-06-01), Chamberlin
patent: 4791590 (1988-12-01), Ku et al.
patent: 4942547 (1990-07-01), Joyce et al.
patent: 5072418 (1991-12-01), Boutaud et al.
patent: 5142489 (1992-08-01), Yamaki
patent: 5157778 (1992-10-01), Bischoff et al.
patent: 5175702 (1992-12-01), Beraud et al.

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