CPU self-test system including the capability of disconnecting a

Boots – shoes – and leggings

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G06F 1122

Patent

active

046213228

ABSTRACT:
In a multiple computer system in which a plurality of computer stations are connected for mutual data transfer via a common data bus, at least one computer station is provided with a fail safe facility which prevents disruption of the entire system due to malfunction of the computer station. The computer is preprogrammed to perform an input/output circuit diagnosis routine after power-up and before control program execution which causes the input/output circuit to output a coded pulse train signal. An abnormality detection circuit receives the coded pulse signal, converts it to a parallel-bit word, and compares the derived word to a stored, predetermined word. If the words match, the detection circuit causes a switching circuit to connect the computer to the common data bus; otherwise, the computer remains disconnected from the rest of the multiple computer system.

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D. Rennels, "Reconfigurable . . . Processing", Computer, vol. 11, No. 7 (Jul. 1978), pp. 49-59.

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