CPU, memory controller, bus bridge integrated circuits, layout s

Details CPU, memory controller, bus bridge integrated circuits, layout s CPU, memory controller, bus bridge integrated circuits, layout s

1996-08-29

1998-07-21

An, Meng-Ai T.

Boots, shoes, and leggings

39580032, 3642328, 36473293, 3649255, 3649256, 3649278, G06F 100, G06F 900

Patent

active

057842914

ABSTRACT:
An integrated circuit includes a single chip (102) that has a microprocessor (702), a memory controller unit (718), an internal bus (714) connecting the microprocessor (702) and the memory controller unit (718), and an external bus to internal bus interface circuit (716). The microprocessor (102) occupies a substantially rectangular region on a substrate (802). The memory controller unit (718) occupies a first strip along one side of the microprocessor unit (702) accessible via the bond pads broadside to the first strip. Other circuits, systems, and methods are disclosed.

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