CPU activity monitoring through cache watching

Details CPU activity monitoring through cache watching CPU activity monitoring through cache watching

1995-12-28

1996-10-08

Beausoliel, Jr., Robert W.

Boots, shoes, and leggings

3642731, 364DIG1, 395750, G06F 1134

Patent

active

055640150

ABSTRACT:
A central processing unit ("CPU") activity monitor and method provides CPU activity information. The CPU activity monitor includes a timer and an activity event counter for receiving a plurality of mode signals from the CPU, a cache miss signal from a cache memory system, and a clock signal from a clock. An activity-to-inactivity value defines when the CPU transitions from an active state to an inactive state. An activity threshold defines when the CPU transitions from an inactive state to an active state.

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patent: 5287508 (1994-02-01), Hejna, Jr. et al.
patent: 5325499 (1994-06-01), Kummer et al.
patent: 5367656 (1994-11-01), Ryan
patent: 5369771 (1994-11-01), Gettel
Dubois `The Design of a lockup-Free cache for High Performance Multiprocessors` IEEE 1988 pp. 352-359.
Microprocessors: vol. II 1994; Intel Corporation; Published 1993; Mt. Prospect, Illinois; pp. 2-80 to 2-84.

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