Counting speculative and non-speculative events

Data processing: software development – installation – and managem – Software program development tool – Testing or debugging

Reexamination Certificate

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Reexamination Certificate

active

06675372

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of computer systems. More specifically, the present invention relates to counting speculative and non-speculative events in a computer system.
2. The Background
Events of various types are normally counted in a computer system in order to assess the performance of the computer system. These events are generally carefully tracked, and then analyzed after a program has completed running.
However, modern scheduling in hardware and software can make tracking events more difficult.
FIG. 1
is a diagram illustrating the flow of a typical computer program. The program may be split into seven blocks A
100
, B
102
, C
104
, D
106
, E
108
, F
110
, G
112
. Normally, without special scheduling, the flow would proceed in the order depicted.
FIG. 2
, however, is a diagram illustrating a dependency graph for the computer program of
FIG. 1. A
first block may be dependent upon a second block if the first block must be executed after the second block (for example, if the second block computes a variable that is used in the first block). As can be seen in
FIG. 2
, the dependencies between the blocks are irrespective of the original ordering of the blocks. Therefore, in the present example, it is possible to reschedule the blocks such that they are performed out-of-order.
FIG. 3
is a diagram illustrating an example of the scheduling of the blocks of
FIG. 2
in a system with dual arithmetic logic units (ALUs). Blocks A
300
, C
304
, E
308
, and G
312
are scheduled in the first ALU, while Blocks B
302
, D
306
, and F
310
are scheduled in the second ALU. The blocks are scheduled based on how long each block takes to complete execution. Thus, Block B
302
may take a significant amount of time to execute whereas block A
300
may take a relatively minimal amount of time to execute. This may lead, however, to problems in counting events.
If an event count is examined at a time t
314
, block D
306
has not yet executed but block E
308
has. This is known as out-of-order execution. The problem is that event counts examined during this period when the blocks have been executed out of order are no longer reliable. For example, an event may occur in block D
306
but not in block E
308
. When measuring the event count after execution of block E
308
, the count will reflect that the event has not yet occurred. Yet, one who examined the software code in-order would have expected the event to have occurred by the time block E
308
has been executed.
What is needed is a solution which provides accurate event counts on out-of-order blocks or instructions.
SUMMARY OF THE INVENTION
Counting events during the execution of one or more instructions in a computer system may be accomplished by maintaining a non-speculative counter for counting events occurring in non-speculative instructions, as well as a separate speculative counter for counting events occurring in speculative instructions. Event counters may be used to count individual events occurring during the processing of instructions. When the instruction has been completed, the amount in the event counter corresponding to a particular event for that instruction is added to the amount in the speculative counter corresponding to the event. Then, any retirable instructions are retired. Once an instruction is retired, it is no longer speculative, allowing the amount in the speculative counter to be decremented and the amount in the non-speculative counter to be incremented by the amount in any event counters corresponding to retirable instructions. The speculative and non-speculative counters may then be examined at any point in time to give a clear picture of the number of times a specific event has occurred, even when instructions are executed out-of-order.


REFERENCES:
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patent: 5136705 (1992-08-01), Stubbs et al.
patent: 5317740 (1994-05-01), Sites
patent: 5367685 (1994-11-01), Gosling
patent: 5493675 (1996-02-01), Faiman, Jr. et al.
patent: 5659754 (1997-08-01), Grove et al.
patent: 5778233 (1998-07-01), Besaw et al.
patent: 5790859 (1998-08-01), Sarkar
patent: 5822788 (1998-10-01), Kahn et al.
patent: 6549930 (2003-04-01), Chrysos et al.
patent: 1 063 585 (2000-12-01), None
Zagha et al., “Performance Analysis Using the MIPS R10000 Performance Counters”, Proceedings of the AMC/IEEE Conference on Supercomputing, ACM, Nov. 1996, 20 pages.*
Dean et al., “ProfileMe: Hardware Support for Instruction-Level Profiling on Out-of-Order Processores”, Proceedings of the 30thAnnual ACM/IEEE International Symposium on Microarchitecture, ACM, 1997, pp. 292-302.

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