Counting level "1" bits to minimize ROM active elements

Details Counting level "1" bits to minimize ROM active elements Counting level "1" bits to minimize ROM active elements

1977-07-22

1979-03-13

Hecker, Stuart N.

Static information storage and retrieval

Read only systems

365104, 365189, G11C 1700, G11C 700

Patent

active

041445872

ABSTRACT:
A semiconductor memory device, wherein a logic level-converting circuit is provided on a chip on which a mask read only memory (M-ROM) is formed; where more than half the number of information bits being stored in the ROM have a logic level of "1", active elements are formed in those cells of the ROM which correspond to information bits having a logic level of "0"; and a connection changeover circuit block is provided by the same process as used in forming the active element in order to connect the logic level-converting circuit to the output terminal of the ROM.

REFERENCES:
patent: 3609708 (1971-09-01), Cragon et al.
patent: 3618052 (1971-11-01), Kwei et al.
patent: 3678475 (1972-07-01), Jordan et al.
patent: 3909808 (1975-09-01), Cochran et al.
patent: 3986180 (1976-10-01), Cade

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