Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Identifying or correcting improper counter operation
Patent
1988-06-24
1989-08-22
Heyman, John S.
Electrical pulse counters, pulse dividers, or shift registers: c
Systems
Identifying or correcting improper counter operation
377 33, 377 51, H03K 2140
Patent
active
048603252
ABSTRACT:
A method and apparatus for testing operation of an n-bit counter with carry inputs in an electronic system. The n-bit counter is divided into a high section and a low section. An external carry is forced to the lowest significant bit of the high section. All states of both sections of the counter are clocked, each state of each of the sections being clocked simultaneously with a corresponding state of the other of the sections. The natural carry is selected so that, at the next clock cycle, when the low section is set at the highest count, the highest significant bit of the low section is carried to the lowest significant bit of the high section.
REFERENCES:
patent: 4336448 (1982-06-01), Shipp et al.
patent: 4373201 (1983-02-01), Bohan
patent: 4736395 (1988-04-01), Sugihara
patent: 4757523 (1988-07-01), Tran
Aria Percy R.
Richard Maurice B.
Advanced Micro Devices , Inc.
Heyman John S.
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