Counter circuit having flip-flops for synchronizing carry signal

Details Counter circuit having flip-flops for synchronizing carry signal Counter circuit having flip-flops for synchronizing carry signal

1986-09-05

1988-04-26

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Particular transfer means

377105, 377119, 377 28, H03K 2140, H03K 2344, H03K 2350

Patent

active

047410051

ABSTRACT:
A multistage counter circuit comprising a plurality of counters connected in cascade, each providing a carry signal and having signal logic levels at an output of each stage inverted by main clock pulses and sub clock pulses, and means including a flip-flop connected at the output of each stage for synchronizing the carry signal of each stage with the main clock pulses to generate a carry signal to a succeeding stage unafffected by delays in the carry signal of a preceding stage.

REFERENCES:
patent: 3354295 (1967-11-01), Kulka
patent: 3513329 (1970-05-01), Washizuka et al.
patent: 3943378 (1976-03-01), Beutler
patent: 4495629 (1985-01-01), Zasio et al.
patent: 4587665 (1986-05-01), Minakuchi
"Asynchronous Binary 2n Coded Counter", Suzuki et al, Technical Dictionary of Pulse Circuits, 1980, p. 470.

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