Excavating
Patent
1983-07-14
1986-02-04
Fleming, Michael R.
Excavating
371 42, 364200, G06F 1110
Patent
active
045690529
ABSTRACT:
An apparatus for protecting computer memory utilizes a parity matrix to generate an n-k check bit signal of an extended linear (n,k,4) code from a k data bit signal. Exclusive-OR gates add the n-k check bit signal to an n-k tag bit signal selected from a predetermined class, to form, when concatenated with the k data bit signal, an element of a code of a certain class. The element comprising the k data bit signal is written in memory. A correction matrix or And gate cooperating with exclusive-OR gates detects an attempt to access the k data bit signal with an n-k key bit signal belonging to the same class as the n-k tag bit signal, but which does not match it.
REFERENCES:
patent: 3466601 (1969-09-01), Tong
patent: 3550082 (1970-12-01), Tong
patent: 4271520 (1981-06-01), Coombes et al.
Cohn Martin
Lempel Abraham
Welch Terry A.
Fleming Michael R.
Sperry Corporation
Terry Howard P.
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