Correlator and delay lock loop circuit

Details Correlator and delay lock loop circuit Correlator and delay lock loop circuit

2007-05-29

2007-05-29

Tran, Khai (Department: 2611)

Pulse or digital communications

Spread spectrum

Direct sequence

C375S376000

Reexamination Certificate

active

10625337

ABSTRACT:
The present invention reduces the scale of circuitry and shortens the code phase detection time needed to achieve initial synchronization. In a correlator for calculating correlation between a received spreading code contained in a received spread-spectrum signal and a reference spreading code, a combined code generator is included. The combined code generator outputs a combined spreading code by weighting and combining a plurality of phase-shifted reference spreading codes A1–AM. Further, an arithmetic circuit calculates correlation between the received spreading code and the plurality of phase-shifted reference spreading codes simultaneously. A phase detection circuit detects the phase difference between the received spreading code and a reference spreading code, namely the phase of the received spreading code from the results of the arithmetic operation.

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Japanese Patent Office Notice of Rejection from corresponding Japanese application 1998-203237 dated Apr. 4, 2006 with translation.

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