Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1998-10-09
2002-08-06
Shalwala, Bipin (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S156000, C341S110000, C341S117000, C341S126000, C341S144000, C382S232000, C382S233000, C382S235000, C382S251000
Reexamination Certificate
active
06429838
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a correlation modulating apparatus for compressing and modulating a serial bit stream into an amplitude signal. Also, this invention is directed to a correlation demodulating apparatus for demodulating a correlation modulated amplitude signal. Further, this invention relates to a data interface using a correlation modulation and demodulation and to a liquid crystal display employing the data interface.
2. Description of the Prior Art
Recently, an amount of information, such as text information and video information, transferred over a is transfer medium has been increasing in comparison to that of audio information since the audio information started to be transferred. Particularly, video information is required to have higher bandwidth to meet the demand necessitated by use of high quality images. Further, the information must be transferred at a high speed so that a user may use it at a proper time. Due to this, a high frequency band is required to transmit a large quantity of information.
For example, in a computer system employing a liquid crystal display(LCD) as shown in
FIG. 1
, the video data transferred from a video card
12
in the computer body
10
to an LCD
20
needs a higher frequency as the picture resolution increases. That is, as the number of picture elements or pixels become greater, a large quantity of video information must be supplied within a given time period. Specifically, since more pixels are included in a liquid crystal panel
22
as the resolution mode of picture changes from the VGA to the XGA or SXGA mode, the quantity of the video data for one picture image increases. Accordingly, the video data transfer frequency from the video card
12
in the computer body
10
to the LCD
20
must be increased. As the frequency of the video data increases as discussed above, an electromagnetic interference(EMI) becomes a serious factor and a timing error occurs more frequently in the LCD
20
. Also, the LCD
20
must have driver integrated circuits
24
, (D-ICs) and a controller
26
which are capable of responding to high frequency signals.
In order to reduce a response frequency of the D-ICs
24
, the LCD
20
adopts a scheme of making the bus lines between each D-IC
24
and the controller
26
in a dual line structure. In this case, a main bus line
11
consisting of 18-bit lines is connected between the video card
12
and the controller
26
, and first and second sub-bus lines
21
and
23
each consisting of 18-bit lines are connected between the controller
26
and the D-ICs
26
. The first sub-bus line
21
is commonly connected to odd-numbered D-ICs
24
A and the secondsub-bus line
23
is commonly connected to even-numbered D-ICs
24
B. Further, a main clock line
13
is connected between the video card
12
and the controller
26
, and a sub-clock line
25
is connected between the controller
26
and the D-ICs
24
. The controller
26
receives the video data from the main bus line
11
comprising 18-bit unit in every one-half clock period of a data clock DCLK provided through the main clock line
13
. The odd-numbered D-ICs
24
A receive the 18-bit video data from the first sub-bus line
21
in every rising edge of the data clock DCLK, via the sub-clock line
25
, from the controller
26
. The even-numbered D-ICs
24
B receive the 18-bit video data from the second sub-bus line
23
in every falling edge of the data clock DCLK. The response frequencies of the D-ICs
24
are reduced by such a dual bus line structure.
In the dual bus line structure, however, because the number of signal lines are increased, the design flexibility of the LCD is limited and the fabrication cost of the LCD increases. Further, in an LCD having the dual bus line structure, the EMI and the timing errors are problematic because the video data are supplied to the controller and the D-ICs at a high frequency. Therefore, modulating and interfacing techniques are needed for transferring a large quantity of data at a low frequency.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a correlation modulating apparatus that is adapted to modulate high frequency data into low frequency signals.
Further object of the present invention is to provide a correlation demodulating apparatus that is adapted to demodulate the low frequency signals modulated with said modulation method to the high frequency data.
Another object of the present invention is to provide a data interfacing apparatus that is adapted to interface high frequency data at a low frequency.
Still another object of the present invention is to provide a liquid crystal display that is suitable for inputting high frequency data from a computer system in a form of low frequency signal.
In order to achieve these and other objects of the invention, a correlation modulating apparatus according to one aspect of the present invention includes means for receiving a data bit stream synchronized with a data clock; means for generating a key clock having less frequency than the data clock; means for listing, in parallel, at least two bit data in the data bit stream using the key clock; and signal converting means for converting the listed at least two bit data into an analog signal.
A correlation demodulating apparatus according to another aspect of the present invention includes means for receiving an analog signal, in which at least two bit data are compressed, and a key clock synchronized with the analog signal; quantizing means for quantizing the analog signal from the receiving means; coding means for coding the quantized analog signal to reconstruct at least two bit parallel data; and reverse aligning means for aligning the at least two bit parallel data in a line using the key clock.
A data interfacing apparatus according to still another aspect of the present invention includes correlation modulating means for correlating a data bit stream from a data source by at least two bit and for modulating the correlated data bit stream into an analog signal; and correlation demodulating means being provided in a data terminal for demodulating the data bit stream by developing the analog signal into the at least two bit data using the correlation modulating means.
A liquid crystal display according to still another aspect of the present invention includes driver integrated circuits for divisionally driving a liquid crystal panel with at least two bit video data; signal input means for inputting a single analog signal, in which the data bit stream is correlatively modulated by at least two bit; and correlation demodulating means for demodulating the data bit stream by developing the analog signal from the signal input means into the at least two bit data and for supplying the demodulated data bit stream to the driver integrated circuits.
REFERENCES:
patent: 4348659 (1982-09-01), Fujimori et al.
patent: 5408498 (1995-04-01), Yoshida
patent: 5504751 (1996-04-01), Ledzius et al.
patent: 5585796 (1996-12-01), Svensson et al.
patent: 5926515 (1999-07-01), Park
patent: 5944317 (1999-08-01), Rohrbaugh
patent: 6047380 (2000-04-01), Nolan et al.
patent: 49-017115 (1974-02-01), None
patent: 60-239141 (1985-11-01), None
patent: 01-243623 (1986-09-01), None
patent: 61-281734 (1986-12-01), None
patent: 64-14631 (1989-01-01), None
patent: 1-243623 (1989-09-01), None
patent: 3-258025 (1991-11-01), None
patent: 5-14420 (1993-01-01), None
patent: 06-095618 (1994-04-01), None
patent: 06-120929 (1994-04-01), None
patent: 05-014420 (1995-04-01), None
patent: 09-258686 (1997-10-01), None
Kovalick Vincent E.
LG. Philips LCD Co. Ltd.
McKenna Long & Alridge LLP
Shalwala Bipin
LandOfFree
Correlation modulating apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Correlation modulating apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Correlation modulating apparatus will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2937451