Pulse or digital communications – Repeaters – Testing
Patent
1997-05-30
1998-11-03
Chin, Stephen
Pulse or digital communications
Repeaters
Testing
375208, 375367, 370350, H04B 1500, H01L 700, H04J 306
Patent
active
058320210
ABSTRACT:
A digital delay-locked loop (DLL) circuit of high synchronous maintaining precision, which is usually affected by the quantization error of signal digitization, is provided for a spread spectrum communications receiver for mobile communications system. Three correlation sections are provided for calculating the correlation values in the peak phase, in the phase leading the peak phase and in the phase lagging behind the peak phase respectively in a delay profile on the basis of a received signal. A control section calculates the difference of the correlation values between the value in the lagging phase and the value of the advancing phase, and determines the threshold value for controlling a spread code generation section. The control section controls so as to advance the generation timing of spread code when the difference between the correlation values is greater than the positive threshold value, so as to delay the generation timing of when the difference value is smaller than the negative threshold value, and so as not to vary the generation timing when the difference value is smaller than the positive threshold value, but greater than the negative threshold value.
REFERENCES:
patent: 5029181 (1991-07-01), Endo et al.
Chin Stephen
Liu Shuwang
NEC Corporation
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