Pulse or digital communications – Spread spectrum – Direct sequence
Reexamination Certificate
2000-02-24
2003-11-11
Pham, Chi (Department: 2631)
Pulse or digital communications
Spread spectrum
Direct sequence
C375S152000, C375S147000
Reexamination Certificate
active
06647056
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a correlation circuit for spread spectrum communication for use on the side of a receiver of a spread spectrum communication system in mobile communication, radio LAN, and the like, particularly to a correlation circuit for spread spectrum communication, a demodulation circuit and a reception apparatus in which power consumption can further be reduced with a simple small-scale constitution.
2. Description of the Related Art
Generally in a spread spectrum (SS) communication system for use in mobile communication, radio local area network (LAN), and the like, on a transmission side, two stage modulation comprising performing narrow band modulation (primary modulation) and further performing spread modulation (secondary modulation) on transmission data is performed, and the data is transmitted. On a reception side, after despread is performed on the received data, thereby returning to the primary modulation, a base band signal is regenerated by a usual wave detecting circuit.
Furthermore, a conventional correlation circuit for spread spectrum communication which outputs correlation for modulating a spread spectrum received signal is constituted of a despread circuit, and a demodulation circuit of a code division multiple access modulated wave. Specifically, in the correlation circuit for spread spectrum communication, a sliding correlator (SC) constituted of a logic circuit is used to perform synchronous trapping and subsequently establish the correlation with the detected synchronous phase.
The sliding correlator uses the correlation circuit to shift a station emitted code series (spread code) by each bit and to obtain the correlation with each received code series. When the correlation is obtained with respect to the number of bits only of a code series length, the synchronous phase with which the correlation reaches a peak is obtained, and the synchronous trapping is performed.
Here, the sliding correlator as one of the conventional despread circuits will be described with reference to FIG.
4
.
FIG. 4
is a constitution block diagram of a part of the conventional sliding correlator.
A portion for obtaining a correlation output in the conventional sliding correlator is constituted of an A/D converter
31
, a multiplier
32
, a PN code register
33
, an adder
34
, and a delay circuit
35
.
Each component of the above-described conventional sliding correlator will be described.
The A/D converter
31
is a high-precision analog/digital converter which converts an analog signal subjected to code division multiple access (CDMA) modulation, transmitted and received by an antenna(not shown) to a digital signal.
The PN code register
33
is a register for outputting a pseudo random noise (PN) code which is the same spread code as that used in the CDMA modulation on the transmission side.
The multiplier
32
is a multiplier which multiplies the digital received data outputted from the A/D converter
31
by the PN code outputted from the PN code register
33
.
The adder
34
and the delay circuit
35
accumulate/add multiplication results outputted from the multiplier
32
for one symbol period and output the integrated value as the correlation output.
The operation of the conventional sliding correlator comprises converting the analog signal of the data received by the antenna to the digital signal in the A/D converter
31
, multiplying the converted digital signal and the PN code outputted from the PN code register
33
in the multiplier
32
, accumulating/adding the results in the adder
34
and the delay circuit
35
, and outputting the addition results of one symbol as the correlation output.
The operation-further comprises shifting a multiplication timing in the multiplier
32
by one chip to change the phase, repeating the multiplication and accumulation/addition, and detecting the synchronous phase with which the correlation output reaches a peak.
The constitution in which the sliding correlator is used as this despread circuit is relatively simple, has a small number of gates, and therefore consumes a small amount of power. However, time is generally required by time of one symbol×the number of chips in one symbol until the synchronous trapping is performed. Therefore, there is a problem that much time is required until the correlation output is outputted.
To solve the problem that much time is required until the correlation output is outputted, it is proposed to use a matched filter (MF) in the correlation circuit for spread spectrum communication, instead of the sliding correlator.
The matched filter performs the synchronous trapping within one symbol time by collectively taking the correlation when the phase is shifted.
Here, the matched filter as another example of the conventional despread circuit will be described with reference to FIG.
5
.
FIG. 5
is a block diagram showing the constitution example of the conventional matched filter.
The conventional matched filter is constituted of an A/D converter
41
, a multiplier
42
, a PN code register
43
, an adder
44
, and a sample hold (S/H) circuit
45
.
Each component of the conventional matched filter will be described.
The A/D converter
41
is a converter which converts a CDMA modulated analog input signal to a digital signal.
There are provided a plurality of sample hold (S/H) circuits
45
which successively take and hold digital signals from the A/D converter
41
.
The PN code register
43
is a register for outputting a PN code which is a spread code.
The multiplier
42
multiplies the digital signal held in each sample hold circuit
45
by the PN code from the PN code register
43
.
The adder
44
collectively adds outputs from the multipliers
42
.
In the operation of the conventional matched filter, the input signal converted to the digital signal by the A/D converter
41
is successively held in a plurality of S/H circuits
45
, the outputs from the S/H circuits
45
and the PN codes outputted from the PN code register
43
are multiplied in the multipliers
42
, further the adders
44
collectively add the multiplication results of the multipliers
42
, and an addition result is outputted. A correlation output is outputted from the addition result.
However, in the general matched filter, in order to take the correlation when the phases are collectively shifted, for example, the number of gates multiplied by the number of chips in one symbol is necessary for the above-described sliding correlator, so that the gate scale increases. Since the increases of LSI price and power consumption are caused, it is actually difficult to use the matched filter in the receiver of a mobile terminal.
Moreover, the base station of wide-band CDMA (W-CDMA) usually has a sector, and the periphery of 360 degrees is divided into six sectors to perform transmission/reception. When an adaptive antenna is unused, two antennas exist in each sector, and therefore perform the reception as the base station. For the number of signals to be demodulated since there are six sectors, two antennas, a complex signal I/Q, and a plurality of carrier frequencies (usually four waves), a multiple, that is, 6×2×2×4=96 in total results.
In order to hold the synchronization, or to detect a delay wave, further for demodulation, the matched filter (MF) or the sliding correlator (SC) is disposed, which further increases the hardware scale.
Additionally, the conventional sliding correlator and matched filter are described in Japanese Patent Application Laid-Open No. 200179/1997 laid open on Jul. 31, 1997 “Multi-User Demodulating Method and Apparatus” (applicant: Kokusai Electric Co., Ltd., Kabushiki Kaisha Takayama, inventors: Kenzo Urabe et al.).
This technique is applied to a method and an apparatus in which a problem about synchronization is solved without using an interference canceler.
As described above, the conventional sliding correlator has a problem that much time is required until the correlation output is obtained. Moreover, the
Hoshina Kouya
Imaizumi Ichiro
Yasunari Kenjiro
Jacobson & Holman PLLC
Kokusai Electric Co. Ltd.
Pham Chi
Williams Demetria
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